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996faa6869
atomic operations will be rewritten anyway with the correct arch specific assembly. But not today. git-svn-id: https://outreach.scidac.gov/svn/spl/trunk@65 7e1ea52c-4ff2-0310-8f11-9dd32ca42a1c
129 lines
2.5 KiB
C
129 lines
2.5 KiB
C
#ifndef _SPL_ATOMIC_H
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#define _SPL_ATOMIC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <linux/module.h>
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#include <linux/spinlock.h>
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/* XXX: Serialize everything through global locks. This is
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* going to be bad for performance, but for now it's the easiest
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* way to ensure correct behavior. I don't like it at all.
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* It would be nicer to make these function to the atomic linux
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* functions, but the normal uint64_t type complicates this.
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*/
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extern spinlock_t atomic64_lock;
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extern spinlock_t atomic32_lock;
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static __inline__ uint32_t
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atomic_add_32(volatile uint32_t *target, int32_t delta)
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{
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uint32_t rc;
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spin_lock(&atomic32_lock);
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rc = *target;
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*target += delta;
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spin_unlock(&atomic32_lock);
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return rc;
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}
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static __inline__ void
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atomic_inc_64(volatile uint64_t *target)
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{
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spin_lock(&atomic64_lock);
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(*target)++;
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spin_unlock(&atomic64_lock);
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}
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static __inline__ void
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atomic_dec_64(volatile uint64_t *target)
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{
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spin_lock(&atomic64_lock);
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(*target)--;
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spin_unlock(&atomic64_lock);
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}
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static __inline__ uint64_t
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atomic_add_64(volatile uint64_t *target, uint64_t delta)
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{
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uint64_t rc;
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spin_lock(&atomic64_lock);
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rc = *target;
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*target += delta;
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spin_unlock(&atomic64_lock);
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return rc;
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}
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static __inline__ uint64_t
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atomic_sub_64(volatile uint64_t *target, uint64_t delta)
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{
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uint64_t rc;
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spin_lock(&atomic64_lock);
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rc = *target;
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*target -= delta;
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spin_unlock(&atomic64_lock);
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return rc;
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}
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static __inline__ uint64_t
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atomic_add_64_nv(volatile uint64_t *target, uint64_t delta)
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{
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spin_lock(&atomic64_lock);
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*target += delta;
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spin_unlock(&atomic64_lock);
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return *target;
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}
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static __inline__ uint64_t
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atomic_sub_64_nv(volatile uint64_t *target, uint64_t delta)
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{
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spin_lock(&atomic64_lock);
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*target -= delta;
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spin_unlock(&atomic64_lock);
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return *target;
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}
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static __inline__ uint64_t
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atomic_cas_64(volatile uint64_t *target, uint64_t cmp,
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uint64_t newval)
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{
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uint64_t rc;
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spin_lock(&atomic64_lock);
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rc = *target;
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if (*target == cmp)
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*target = newval;
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spin_unlock(&atomic64_lock);
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return rc;
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}
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#if defined(__x86_64__)
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/* XXX: Implement atomic_cas_ptr() in terms of uint64'ts. This
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* is of course only safe and correct for 64 bit arches... but
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* for now I'm OK with that.
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*/
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static __inline__ void *
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atomic_cas_ptr(volatile void *target, void *cmp, void *newval)
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{
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return (void *)atomic_cas_64((volatile uint64_t *)target,
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(uint64_t)cmp, (uint64_t)newval);
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}
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SPL_ATOMIC_H */
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