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Correctly implement atomic_cas_ptr() function. Ideally all of these
atomic operations will be rewritten anyway with the correct arch specific assembly. But not today. git-svn-id: https://outreach.scidac.gov/svn/spl/trunk@65 7e1ea52c-4ff2-0310-8f11-9dd32ca42a1c
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@ -16,7 +16,6 @@ extern "C" {
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*/
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extern spinlock_t atomic64_lock;
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extern spinlock_t atomic32_lock;
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extern spinlock_t atomic_lock;
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static __inline__ uint32_t
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atomic_add_32(volatile uint32_t *target, int32_t delta)
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@ -94,7 +93,7 @@ atomic_sub_64_nv(volatile uint64_t *target, uint64_t delta)
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}
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static __inline__ uint64_t
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atomic_cas_64(volatile uint64_t *target, uint64_t cmp,
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atomic_cas_64(volatile uint64_t *target, uint64_t cmp,
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uint64_t newval)
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{
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uint64_t rc;
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@ -108,19 +107,18 @@ atomic_cas_64(volatile uint64_t *target, uint64_t cmp,
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return rc;
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}
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#if defined(__x86_64__)
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/* XXX: Implement atomic_cas_ptr() in terms of uint64'ts. This
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* is of course only safe and correct for 64 bit arches... but
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* for now I'm OK with that.
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*/
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static __inline__ void *
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atomic_cas_ptr(volatile void *target, void *cmp, void *newval)
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atomic_cas_ptr(volatile void *target, void *cmp, void *newval)
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{
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void *rc;
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spin_lock(&atomic_lock);
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rc = (void *)target;
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if (target == cmp)
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target = newval;
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spin_unlock(&atomic_lock);
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return rc;
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return (void *)atomic_cas_64((volatile uint64_t *)target,
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(uint64_t)cmp, (uint64_t)newval);
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}
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#endif
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#ifdef __cplusplus
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}
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@ -3,8 +3,6 @@
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/* Global atomic lock declarations */
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spinlock_t atomic64_lock = SPIN_LOCK_UNLOCKED;
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spinlock_t atomic32_lock = SPIN_LOCK_UNLOCKED;
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spinlock_t atomic_lock = SPIN_LOCK_UNLOCKED;
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EXPORT_SYMBOL(atomic64_lock);
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EXPORT_SYMBOL(atomic32_lock);
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EXPORT_SYMBOL(atomic_lock);
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