e752bbe5e2
When turning off the "KVM hardware virtualization" checkbox in Proxmox VE, the TCG accelerator is used, so these fixes are relevant then. The first patch is included to allow cherry-picking the others without changes. Reported-by: Thomas Lamprecht <t.lamprecht@proxmox.com> Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
48 lines
1.9 KiB
Diff
48 lines
1.9 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Richard Henderson <richard.henderson@linaro.org>
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Date: Sat, 14 Jan 2023 08:06:01 -1000
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Subject: [PATCH] target/i386: Fix C flag for BLSI, BLSMSK, BLSR
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We forgot to set cc_src, which is used for computing C.
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1370
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Message-Id: <20230114180601.2993644-1-richard.henderson@linaro.org>
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Cc: qemu-stable@nongnu.org
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Fixes: 1d0b926150e5 ("target/i386: move scalar 0F 38 and 0F 3A instruction to new decoder", 2022-10-18)
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry-picked from commit 99282098dc74c2055bde5652bde6cf0067d0c370)
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Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
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---
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target/i386/tcg/emit.c.inc | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
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index 99f6ba6e19..4d7702c106 100644
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--- a/target/i386/tcg/emit.c.inc
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+++ b/target/i386/tcg/emit.c.inc
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@@ -1111,6 +1111,7 @@ static void gen_BLSI(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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{
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MemOp ot = decode->op[0].ot;
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+ tcg_gen_mov_tl(cpu_cc_src, s->T0);
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tcg_gen_neg_tl(s->T1, s->T0);
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tcg_gen_and_tl(s->T0, s->T0, s->T1);
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tcg_gen_mov_tl(cpu_cc_dst, s->T0);
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@@ -1121,6 +1122,7 @@ static void gen_BLSMSK(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode
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{
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MemOp ot = decode->op[0].ot;
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+ tcg_gen_mov_tl(cpu_cc_src, s->T0);
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tcg_gen_subi_tl(s->T1, s->T0, 1);
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tcg_gen_xor_tl(s->T0, s->T0, s->T1);
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tcg_gen_mov_tl(cpu_cc_dst, s->T0);
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@@ -1131,6 +1133,7 @@ static void gen_BLSR(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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{
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MemOp ot = decode->op[0].ot;
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+ tcg_gen_mov_tl(cpu_cc_src, s->T0);
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tcg_gen_subi_tl(s->T1, s->T0, 1);
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tcg_gen_and_tl(s->T0, s->T0, s->T1);
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tcg_gen_mov_tl(cpu_cc_dst, s->T0);
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