48 lines
1.6 KiB
Diff
48 lines
1.6 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= <berrange@redhat.com>
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Date: Wed, 15 May 2019 15:10:11 +0100
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Subject: [PATCH] docs: recommend use of md-clear feature on all Intel CPUs
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Update x86 CPU model guidance to recommend that the md-clear feature is
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manually enabled with all Intel CPU models, when supported by the host
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microcode.
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Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
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Message-Id: <20190515141011.5315-3-berrange@redhat.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit 2c7e82a30774730100da9dbe68d2360459030d91)
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Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
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---
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docs/qemu-cpu-models.texi | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/docs/qemu-cpu-models.texi b/docs/qemu-cpu-models.texi
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index 23c11dc86f..ad040cfc98 100644
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--- a/docs/qemu-cpu-models.texi
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+++ b/docs/qemu-cpu-models.texi
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@@ -200,6 +200,18 @@ Not included by default in any Intel CPU model.
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Should be explicitly turned on for all Intel CPU models.
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Note that not all CPU hardware will support this feature.
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+
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+@item @code{md-clear}
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+
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+Required to confirm the MDS (CVE-2018-12126, CVE-2018-12127, CVE-2018-12130,
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+CVE-2019-11091) fixes.
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+
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+Not included by default in any Intel CPU model.
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+
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+Must be explicitly turned on for all Intel CPU models.
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+
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+Requires the host CPU microcode to support this feature before it
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+can be used for guest CPUs.
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@end table
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--
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2.20.1
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