pve-qemu-qoup/debian/patches/extra/0032-i386-Add-spec-ctrl-CPUID-bit.patch
Wolfgang Bumiller 3dcc8d3ba2 merge SPEC_CTRL MSR and -IBRS CPU model patches
Signed-off-by: Wolfgang Bumiller <w.bumiller@proxmox.com>
2018-01-15 15:26:07 +01:00

42 lines
1.4 KiB
Diff

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Eduardo Habkost <ehabkost@redhat.com>
Date: Tue, 9 Jan 2018 13:45:15 -0200
Subject: [PATCH] i386: Add spec-ctrl CPUID bit
Add the feature name and a CPUID_7_0_EDX_SPEC_CTRL macro.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
target/i386/cpu.c | 2 +-
target/i386/cpu.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index c673521016..faf1ff6dcc 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -460,7 +460,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL,
+ NULL, NULL, "spec-ctrl", NULL,
NULL, NULL, NULL, NULL,
},
.cpuid_eax = 7,
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index cc322d6b39..71261f4819 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -640,6 +640,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
+#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */
#define CPUID_XSAVE_XSAVEOPT (1U << 0)
#define CPUID_XSAVE_XSAVEC (1U << 1)
--
2.11.0