113 lines
4.6 KiB
Diff
113 lines
4.6 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Kai-Heng Feng <kai.heng.feng@canonical.com>
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Date: Tue, 13 Jul 2021 20:50:07 +0800
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Subject: [PATCH] PCI: Reinstate "PCI: Coalesce host bridge contiguous
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apertures"
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Built-in graphics on HP EliteDesk 805 G6 doesn't work because graphics
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can't get the BAR it needs:
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pci_bus 0000:00: root bus resource [mem 0x10020200000-0x100303fffff window]
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pci_bus 0000:00: root bus resource [mem 0x10030400000-0x100401fffff window]
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pci 0000:00:08.1: bridge window [mem 0xd2000000-0xd23fffff]
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pci 0000:00:08.1: bridge window [mem 0x10030000000-0x100401fffff 64bit pref]
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pci 0000:00:08.1: can't claim BAR 15 [mem 0x10030000000-0x100401fffff 64bit pref]: no compatible bridge window
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pci 0000:00:08.1: [mem 0x10030000000-0x100401fffff 64bit pref] clipped to [mem 0x10030000000-0x100303fffff 64bit pref]
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pci 0000:00:08.1: bridge window [mem 0x10030000000-0x100303fffff 64bit pref]
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pci 0000:07:00.0: can't claim BAR 0 [mem 0x10030000000-0x1003fffffff 64bit pref]: no compatible bridge window
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pci 0000:07:00.0: can't claim BAR 2 [mem 0x10040000000-0x100401fffff 64bit pref]: no compatible bridge window
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However, the root bus has two contiguous apertures that can contain the
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child resource requested.
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Coalesce contiguous apertures so we can allocate from the entire contiguous
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region.
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This is the second take of commit 65db04053efe ("PCI: Coalesce host
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bridge contiguous apertures"). The original approach sorts the apertures
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by address, but that makes NVMe stop working on QEMU ppc:sam460ex:
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PCI host bridge to bus 0002:00
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pci_bus 0002:00: root bus resource [io 0x0000-0xffff]
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pci_bus 0002:00: root bus resource [mem 0xd80000000-0xdffffffff] (bus address [0x80000000-0xffffffff])
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pci_bus 0002:00: root bus resource [mem 0xc0ee00000-0xc0eefffff] (bus address [0x00000000-0x000fffff])
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After the offending commit:
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PCI host bridge to bus 0002:00
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pci_bus 0002:00: root bus resource [io 0x0000-0xffff]
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pci_bus 0002:00: root bus resource [mem 0xc0ee00000-0xc0eefffff] (bus address [0x00000000-0x000fffff])
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pci_bus 0002:00: root bus resource [mem 0xd80000000-0xdffffffff] (bus address [0x80000000-0xffffffff])
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Since the apertures on HP EliteDesk 805 G6 are already in ascending
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order, doing a precautious sorting is not necessary.
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Remove the sorting part to avoid the regression on ppc:sam460ex.
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Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=212013
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Cc: Guenter Roeck <linux@roeck-us.net>
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Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
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Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
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Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
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Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
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---
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drivers/pci/probe.c | 31 +++++++++++++++++++++++++++----
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1 file changed, 27 insertions(+), 4 deletions(-)
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diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
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index c0abe906b84e..8b7c58dec9e4 100644
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--- a/drivers/pci/probe.c
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+++ b/drivers/pci/probe.c
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@@ -883,11 +883,11 @@ static void pci_set_bus_msi_domain(struct pci_bus *bus)
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static int pci_register_host_bridge(struct pci_host_bridge *bridge)
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{
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struct device *parent = bridge->dev.parent;
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- struct resource_entry *window, *n;
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+ struct resource_entry *window, *next, *n;
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struct pci_bus *bus, *b;
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- resource_size_t offset;
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+ resource_size_t offset, next_offset;
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LIST_HEAD(resources);
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- struct resource *res;
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+ struct resource *res, *next_res;
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char addr[64], *fmt;
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const char *name;
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int err;
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@@ -970,11 +970,34 @@ static int pci_register_host_bridge(struct pci_host_bridge *bridge)
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if (nr_node_ids > 1 && pcibus_to_node(bus) == NUMA_NO_NODE)
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dev_warn(&bus->dev, "Unknown NUMA node; performance will be reduced\n");
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+ /* Coalesce contiguous windows */
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+ resource_list_for_each_entry_safe(window, n, &resources) {
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+ if (list_is_last(&window->node, &resources))
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+ break;
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+
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+ next = list_next_entry(window, node);
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+ offset = window->offset;
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+ res = window->res;
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+ next_offset = next->offset;
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+ next_res = next->res;
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+
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+ if (res->flags != next_res->flags || offset != next_offset)
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+ continue;
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+
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+ if (res->end + 1 == next_res->start) {
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+ next_res->start = res->start;
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+ res->flags = res->start = res->end = 0;
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+ }
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+ }
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+
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/* Add initial resources to the bus */
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resource_list_for_each_entry_safe(window, n, &resources) {
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- list_move_tail(&window->node, &bridge->windows);
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offset = window->offset;
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res = window->res;
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+ if (!res->end)
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+ continue;
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+
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+ list_move_tail(&window->node, &bridge->windows);
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if (res->flags & IORESOURCE_BUS)
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pci_bus_insert_busn_res(bus, bus->number, res->end);
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