a0f7ab8a6a
cherry-pick from upstream 4.14
48 lines
1.4 KiB
Diff
48 lines
1.4 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Tim Chen <tim.c.chen@linux.intel.com>
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Date: Fri, 20 Oct 2017 12:56:29 -0700
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Subject: [PATCH] x86/mm: Set IBPB upon context switch
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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CVE-2017-5753
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CVE-2017-5715
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Set IBPB on context switch with changing of page table.
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Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
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Signed-off-by: Andy Whitcroft <apw@canonical.com>
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Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
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(cherry picked from commit a3320203792b633fb96df5d0bbfb7036129b78e2)
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Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
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---
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arch/x86/mm/tlb.c | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
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index 06f3854d0a4f..bb3ded3a4e5f 100644
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--- a/arch/x86/mm/tlb.c
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+++ b/arch/x86/mm/tlb.c
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@@ -12,6 +12,7 @@
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#include <asm/cache.h>
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#include <asm/apic.h>
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#include <asm/uv/uv.h>
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+#include <asm/microcode.h>
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#include <linux/debugfs.h>
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/*
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@@ -218,6 +219,9 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
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u16 new_asid;
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bool need_flush;
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+ if (boot_cpu_has(X86_FEATURE_SPEC_CTRL))
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+ native_wrmsrl(MSR_IA32_PRED_CMD, FEATURE_SET_IBPB);
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+
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if (IS_ENABLED(CONFIG_VMAP_STACK)) {
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/*
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* If our current stack is in vmalloc space and isn't
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--
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2.14.2
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