91 lines
2.8 KiB
Diff
91 lines
2.8 KiB
Diff
From 1b88ea4170f72b4fed72e9235c88b6121f153b21 Mon Sep 17 00:00:00 2001
|
|
From: Andi Kleen <ak@linux.intel.com>
|
|
Date: Fri, 13 Oct 2017 14:56:44 -0700
|
|
Subject: [PATCH 068/231] x86/fpu: Make XSAVE check the base CPUID features
|
|
before enabling
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
CVE-2017-5754
|
|
|
|
Before enabling XSAVE, not only check the XSAVE specific CPUID bits,
|
|
but also the base CPUID features of the respective XSAVE feature.
|
|
This allows to disable individual XSAVE states using the existing
|
|
clearcpuid= option, which can be useful for performance testing
|
|
and debugging, and also in general avoids inconsistencies.
|
|
|
|
Signed-off-by: Andi Kleen <ak@linux.intel.com>
|
|
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
|
|
Cc: Linus Torvalds <torvalds@linux-foundation.org>
|
|
Cc: Peter Zijlstra <peterz@infradead.org>
|
|
Link: http://lkml.kernel.org/r/20171013215645.23166-5-andi@firstfloor.org
|
|
Signed-off-by: Ingo Molnar <mingo@kernel.org>
|
|
(cherry picked from commit ccb18db2ab9d923df07e7495123fe5fb02329713)
|
|
Signed-off-by: Andy Whitcroft <apw@canonical.com>
|
|
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
|
|
(cherry picked from commit 2efda26f9ee0eeb9919772e90ca30dbe59008dc8)
|
|
Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
|
|
---
|
|
arch/x86/kernel/fpu/xstate.c | 23 +++++++++++++++++++++++
|
|
1 file changed, 23 insertions(+)
|
|
|
|
diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
|
|
index c24ac1efb12d..3abe85b08234 100644
|
|
--- a/arch/x86/kernel/fpu/xstate.c
|
|
+++ b/arch/x86/kernel/fpu/xstate.c
|
|
@@ -15,6 +15,7 @@
|
|
#include <asm/fpu/xstate.h>
|
|
|
|
#include <asm/tlbflush.h>
|
|
+#include <asm/cpufeature.h>
|
|
|
|
/*
|
|
* Although we spell it out in here, the Processor Trace
|
|
@@ -36,6 +37,19 @@ static const char *xfeature_names[] =
|
|
"unknown xstate feature" ,
|
|
};
|
|
|
|
+static short xsave_cpuid_features[] __initdata = {
|
|
+ X86_FEATURE_FPU,
|
|
+ X86_FEATURE_XMM,
|
|
+ X86_FEATURE_AVX,
|
|
+ X86_FEATURE_MPX,
|
|
+ X86_FEATURE_MPX,
|
|
+ X86_FEATURE_AVX512F,
|
|
+ X86_FEATURE_AVX512F,
|
|
+ X86_FEATURE_AVX512F,
|
|
+ X86_FEATURE_INTEL_PT,
|
|
+ X86_FEATURE_PKU,
|
|
+};
|
|
+
|
|
/*
|
|
* Mask of xstate features supported by the CPU and the kernel:
|
|
*/
|
|
@@ -702,6 +716,7 @@ void __init fpu__init_system_xstate(void)
|
|
unsigned int eax, ebx, ecx, edx;
|
|
static int on_boot_cpu __initdata = 1;
|
|
int err;
|
|
+ int i;
|
|
|
|
WARN_ON_FPU(!on_boot_cpu);
|
|
on_boot_cpu = 0;
|
|
@@ -735,6 +750,14 @@ void __init fpu__init_system_xstate(void)
|
|
goto out_disable;
|
|
}
|
|
|
|
+ /*
|
|
+ * Clear XSAVE features that are disabled in the normal CPUID.
|
|
+ */
|
|
+ for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) {
|
|
+ if (!boot_cpu_has(xsave_cpuid_features[i]))
|
|
+ xfeatures_mask &= ~BIT(i);
|
|
+ }
|
|
+
|
|
xfeatures_mask &= fpu__get_supported_xfeatures_mask();
|
|
|
|
/* Enable xstate instructions to be able to continue with initialization: */
|
|
--
|
|
2.14.2
|
|
|