From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Tom Lendacky Date: Wed, 20 Dec 2017 10:55:47 +0000 Subject: [PATCH] x86/svm: Set IBRS value on VM entry and exit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CVE-2017-5753 CVE-2017-5715 Set/restore the guests IBRS value on VM entry. On VM exit back to the kernel save the guest IBRS value and then set IBRS to 1. Signed-off-by: Paolo Bonzini Signed-off-by: Tom Lendacky Signed-off-by: Andy Whitcroft Signed-off-by: Kleber Sacilotto de Souza (cherry picked from commit 72f71e6826fac9a656c3994fb6f979cd65a14c64) Signed-off-by: Fabian Grünbichler --- arch/x86/kvm/svm.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 94adf6becc2e..a1b19e810c49 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -175,6 +175,8 @@ struct vcpu_svm { u64 next_rip; + u64 spec_ctrl; + u64 host_user_msrs[NR_HOST_SAVE_USER_MSRS]; struct { u16 fs; @@ -3547,6 +3549,9 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) case MSR_VM_CR: msr_info->data = svm->nested.vm_cr_msr; break; + case MSR_IA32_SPEC_CTRL: + msr_info->data = svm->spec_ctrl; + break; case MSR_IA32_UCODE_REV: msr_info->data = 0x01000065; break; @@ -3702,6 +3707,9 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) case MSR_VM_IGNNE: vcpu_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data); break; + case MSR_IA32_SPEC_CTRL: + svm->spec_ctrl = data; + break; case MSR_IA32_APICBASE: if (kvm_vcpu_apicv_active(vcpu)) avic_update_vapic_bar(to_svm(vcpu), data); @@ -4883,6 +4891,9 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu) local_irq_enable(); + if (ibrs_inuse && (svm->spec_ctrl != FEATURE_ENABLE_IBRS)) + wrmsrl(MSR_IA32_SPEC_CTRL, svm->spec_ctrl); + asm volatile ( "push %%" _ASM_BP "; \n\t" "mov %c[rbx](%[svm]), %%" _ASM_BX " \n\t" @@ -4975,6 +4986,12 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu) #endif ); + if (ibrs_inuse) { + rdmsrl(MSR_IA32_SPEC_CTRL, svm->spec_ctrl); + if (svm->spec_ctrl != FEATURE_ENABLE_IBRS) + wrmsrl(MSR_IA32_SPEC_CTRL, FEATURE_ENABLE_IBRS); + } + #ifdef CONFIG_X86_64 wrmsrl(MSR_GS_BASE, svm->host.gs_base); #else -- 2.14.2