Revert "backport patch to fix TSC scaling for SVM"
this was actually intended for the stable 5.15 branch, already
included in 5.19.
This reverts commit 198fde3a16
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Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
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198fde3a16
commit
ddff189f90
@ -1,113 +0,0 @@
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From 955c2b4d64593baecc87c64d1354cd5786975bd9 Mon Sep 17 00:00:00 2001
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From: Maxim Levitsky <mlevitsk@redhat.com>
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Date: Mon, 6 Jun 2022 21:11:49 +0300
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Subject: [PATCH] KVM: SVM: fix tsc scaling cache logic
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SVM uses a per-cpu variable to cache the current value of the
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tsc scaling multiplier msr on each cpu.
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Commit 1ab9287add5e2
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("KVM: X86: Add vendor callbacks for writing the TSC multiplier")
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broke this caching logic.
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Refactor the code so that all TSC scaling multiplier writes go through
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a single function which checks and updates the cache.
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This fixes the following scenario:
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1. A CPU runs a guest with some tsc scaling ratio.
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2. New guest with different tsc scaling ratio starts on this CPU
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and terminates almost immediately.
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This ensures that the short running guest had set the tsc scaling ratio just
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once when it was set via KVM_SET_TSC_KHZ. Due to the bug,
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the per-cpu cache is not updated.
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3. The original guest continues to run, it doesn't restore the msr
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value back to its own value, because the cache matches,
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and thus continues to run with a wrong tsc scaling ratio.
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Fixes: 1ab9287add5e2 ("KVM: X86: Add vendor callbacks for writing the TSC multiplier")
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Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
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Message-Id: <20220606181149.103072-1-mlevitsk@redhat.com>
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Cc: stable@vger.kernel.org
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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[FE: backport, mainly dropped parts for the not yet present
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5228eb96a487 ("KVM: x86: nSVM: implement nested TSC scaling")]
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Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
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---
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arch/x86/kvm/svm/svm.c | 30 +++++++++++++++++++-----------
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1 file changed, 19 insertions(+), 11 deletions(-)
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diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
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index 938b9b24f0ee..ea87d06bdaba 100644
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--- a/arch/x86/kvm/svm/svm.c
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+++ b/arch/x86/kvm/svm/svm.c
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@@ -468,11 +468,24 @@ static int has_svm(void)
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return 1;
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}
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+void __svm_write_tsc_multiplier(u64 multiplier)
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+{
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+ preempt_disable();
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+
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+ if (multiplier == __this_cpu_read(current_tsc_ratio))
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+ goto out;
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+
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+ wrmsrl(MSR_AMD64_TSC_RATIO, multiplier);
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+ __this_cpu_write(current_tsc_ratio, multiplier);
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+out:
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+ preempt_enable();
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+}
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+
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static void svm_hardware_disable(void)
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{
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/* Make sure we clean up behind us */
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if (static_cpu_has(X86_FEATURE_TSCRATEMSR))
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- wrmsrl(MSR_AMD64_TSC_RATIO, TSC_RATIO_DEFAULT);
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+ __svm_write_tsc_multiplier(TSC_RATIO_DEFAULT);
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cpu_svm_disable();
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@@ -514,8 +527,7 @@ static int svm_hardware_enable(void)
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wrmsrl(MSR_VM_HSAVE_PA, __sme_page_pa(sd->save_area));
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if (static_cpu_has(X86_FEATURE_TSCRATEMSR)) {
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- wrmsrl(MSR_AMD64_TSC_RATIO, TSC_RATIO_DEFAULT);
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- __this_cpu_write(current_tsc_ratio, TSC_RATIO_DEFAULT);
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+ __svm_write_tsc_multiplier(TSC_RATIO_DEFAULT);
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}
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@@ -1128,9 +1140,10 @@ static void svm_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
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static void svm_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 multiplier)
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{
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- wrmsrl(MSR_AMD64_TSC_RATIO, multiplier);
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+ __svm_write_tsc_multiplier(multiplier);
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}
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+
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/* Evaluate instruction intercepts that depend on guest CPUID features. */
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static void svm_recalc_instruction_intercepts(struct kvm_vcpu *vcpu,
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struct vcpu_svm *svm)
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@@ -1453,13 +1466,8 @@ static void svm_prepare_guest_switch(struct kvm_vcpu *vcpu)
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vmsave(__sme_page_pa(sd->save_area));
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}
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- if (static_cpu_has(X86_FEATURE_TSCRATEMSR)) {
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- u64 tsc_ratio = vcpu->arch.tsc_scaling_ratio;
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- if (tsc_ratio != __this_cpu_read(current_tsc_ratio)) {
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- __this_cpu_write(current_tsc_ratio, tsc_ratio);
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- wrmsrl(MSR_AMD64_TSC_RATIO, tsc_ratio);
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- }
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- }
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+ if (static_cpu_has(X86_FEATURE_TSCRATEMSR))
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+ __svm_write_tsc_multiplier(vcpu->arch.tsc_scaling_ratio);
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if (likely(tsc_aux_uret_slot >= 0))
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kvm_set_user_return_msr(tsc_aux_uret_slot, svm->tsc_aux, -1ull);
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--
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2.30.2
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