
found with using the `stablefixes` tool from //git.lwn.net/gitdm.git like: git log --decorate v5.4.100^..v5.4.211 | stablefixes The resulting stable-fixes.html was checked for entries with fixes that got added later than v5.4.203 of regressions introduced earlier than that version. Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
73 lines
2.9 KiB
Diff
73 lines
2.9 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
|
From: Chris Wilson <chris.p.wilson@intel.com>
|
|
Date: Tue, 12 Jul 2022 16:21:33 +0100
|
|
Subject: [PATCH] drm/i915/gt: Serialize TLB invalidates with GT resets
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
[ Upstream commit a1c5a7bf79c1faa5633b918b5c0666545e84c4d1 ]
|
|
|
|
Avoid trying to invalidate the TLB in the middle of performing an
|
|
engine reset, as this may result in the reset timing out. Currently,
|
|
the TLB invalidate is only serialised by its own mutex, forgoing the
|
|
uncore lock, but we can take the uncore->lock as well to serialise
|
|
the mmio access, thereby serialising with the GDRST.
|
|
|
|
Tested on a NUC5i7RYB, BIOS RYBDWi35.86A.0380.2019.0517.1530 with
|
|
i915 selftest/hangcheck.
|
|
|
|
Cc: stable@vger.kernel.org # v4.4 and upper
|
|
Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
|
|
Reported-by: Mauro Carvalho Chehab <mchehab@kernel.org>
|
|
Tested-by: Mauro Carvalho Chehab <mchehab@kernel.org>
|
|
Reviewed-by: Mauro Carvalho Chehab <mchehab@kernel.org>
|
|
Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
|
|
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
|
|
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
|
|
Acked-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
|
|
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
|
|
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
|
|
Link: https://patchwork.freedesktop.org/patch/msgid/1e59a7c45dd919a530256b9ac721ac6ea86c0677.1657639152.git.mchehab@kernel.org
|
|
(cherry picked from commit 33da97894758737895e90c909f16786052680ef4)
|
|
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
|
|
Signed-off-by: Sasha Levin <sashal@kernel.org>
|
|
Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
|
|
---
|
|
drivers/gpu/drm/i915/gt/intel_gt.c | 15 ++++++++++++++-
|
|
1 file changed, 14 insertions(+), 1 deletion(-)
|
|
|
|
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
|
|
index c8c070375d29..f6d7f5d307d7 100644
|
|
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
|
|
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
|
|
@@ -339,6 +339,20 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
|
|
mutex_lock(>->tlb_invalidate_lock);
|
|
intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
|
|
|
|
+ spin_lock_irq(&uncore->lock); /* serialise invalidate with GT reset */
|
|
+
|
|
+ for_each_engine(engine, gt, id) {
|
|
+ struct reg_and_bit rb;
|
|
+
|
|
+ rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num);
|
|
+ if (!i915_mmio_reg_offset(rb.reg))
|
|
+ continue;
|
|
+
|
|
+ intel_uncore_write_fw(uncore, rb.reg, rb.bit);
|
|
+ }
|
|
+
|
|
+ spin_unlock_irq(&uncore->lock);
|
|
+
|
|
for_each_engine(engine, gt, id) {
|
|
/*
|
|
* HW architecture suggest typical invalidation time at 40us,
|
|
@@ -353,7 +367,6 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
|
|
if (!i915_mmio_reg_offset(rb.reg))
|
|
continue;
|
|
|
|
- intel_uncore_write_fw(uncore, rb.reg, rb.bit);
|
|
if (__intel_wait_for_register_fw(uncore,
|
|
rb.reg, rb.bit, 0,
|
|
timeout_us, timeout_ms,
|