4af054d560
(generated with debian/scripts/import-upstream-tag) Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
70 lines
2.2 KiB
Diff
70 lines
2.2 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Marc Bevand <m@zorinaq.com>
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Date: Tue, 21 Dec 2021 15:31:12 -0800
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Subject: [PATCH] EDAC/amd64: Add PCI device IDs for family 19h model 50h
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Add the new family 19h model 50h PCI IDs (device 18h functions 0 and 6)
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to support Ryzen 5000 APUs ("Cezanne").
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Signed-off-by: Marc Bevand <m@zorinaq.com>
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Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
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---
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drivers/edac/amd64_edac.c | 15 +++++++++++++++
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drivers/edac/amd64_edac.h | 3 +++
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2 files changed, 18 insertions(+)
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diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
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index c6c58f01067f..f8ef2edf8abf 100644
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--- a/drivers/edac/amd64_edac.c
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+++ b/drivers/edac/amd64_edac.c
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@@ -2660,6 +2660,16 @@ static struct amd64_family_type family_types[] = {
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.dbam_to_cs = f17_addr_mask_to_cs_size,
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}
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},
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+ [F19_M50H_CPUS] = {
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+ .ctl_name = "F19h_M50h",
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+ .f0_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F0,
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+ .f6_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F6,
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+ .max_mcs = 2,
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+ .ops = {
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+ .early_channel_count = f17_early_channel_count,
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+ .dbam_to_cs = f17_addr_mask_to_cs_size,
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+ }
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+ },
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};
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/*
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@@ -3706,6 +3716,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
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pvt->ops = &family_types[F17_M70H_CPUS].ops;
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fam_type->ctl_name = "F19h_M20h";
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break;
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+ } else if (pvt->model >= 0x50 && pvt->model <= 0x5f) {
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+ fam_type = &family_types[F19_M50H_CPUS];
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+ pvt->ops = &family_types[F19_M50H_CPUS].ops;
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+ fam_type->ctl_name = "F19h_M50h";
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+ break;
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} else if (pvt->model >= 0xa0 && pvt->model <= 0xaf) {
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fam_type = &family_types[F19_M10H_CPUS];
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pvt->ops = &family_types[F19_M10H_CPUS].ops;
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diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
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index 650cab401e21..352bda9803f6 100644
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--- a/drivers/edac/amd64_edac.h
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+++ b/drivers/edac/amd64_edac.h
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@@ -128,6 +128,8 @@
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#define PCI_DEVICE_ID_AMD_19H_DF_F6 0x1656
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#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F0 0x14ad
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#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F6 0x14b3
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+#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F0 0x166a
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+#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F6 0x1670
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/*
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* Function 1 - Address Map
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@@ -301,6 +303,7 @@ enum amd_families {
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F17_M70H_CPUS,
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F19_CPUS,
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F19_M10H_CPUS,
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+ F19_M50H_CPUS,
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NUM_FAMILIES,
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};
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