91 lines
3.5 KiB
Diff
91 lines
3.5 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Mon, 22 Nov 2021 19:43:09 -0500
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Subject: [PATCH] KVM: VMX: prepare sync_pir_to_irr for running with APICv
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disabled
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If APICv is disabled for this vCPU, assigned devices may still attempt to
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post interrupts. In that case, we need to cancel the vmentry and deliver
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the interrupt with KVM_REQ_EVENT. Extend the existing code that handles
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injection of L1 interrupts into L2 to cover this case as well.
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vmx_hwapic_irr_update is only called when APICv is active so it would be
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confusing to add a check for vcpu->arch.apicv_active in there. Instead,
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just use vmx_set_rvi directly in vmx_sync_pir_to_irr.
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Cc: stable@vger.kernel.org
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Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
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Reviewed-by: David Matlack <dmatlack@google.com>
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Reviewed-by: Sean Christopherson <seanjc@google.com>
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Message-Id: <20211123004311.2954158-3-pbonzini@redhat.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 7e1901f6c86c896acff6609e0176f93f756d8b2a)
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[ T: reused WARN instead of newer KVM_BUG_ON for minimal change ]
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Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
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---
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arch/x86/kvm/vmx/vmx.c | 39 +++++++++++++++++++++++++--------------
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1 file changed, 25 insertions(+), 14 deletions(-)
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diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
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index fc6fbaba1cb5..2f6db087e243 100644
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--- a/arch/x86/kvm/vmx/vmx.c
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+++ b/arch/x86/kvm/vmx/vmx.c
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@@ -6331,9 +6331,9 @@ static int vmx_sync_pir_to_irr(struct kvm_vcpu *vcpu)
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{
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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int max_irr;
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- bool max_irr_updated;
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+ bool got_posted_interrupt;
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- WARN_ON(!vcpu->arch.apicv_active);
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+ WARN_ON(!enable_apicv);
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if (pi_test_on(&vmx->pi_desc)) {
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pi_clear_on(&vmx->pi_desc);
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/*
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@@ -6341,22 +6341,33 @@ static int vmx_sync_pir_to_irr(struct kvm_vcpu *vcpu)
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* But on x86 this is just a compiler barrier anyway.
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*/
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smp_mb__after_atomic();
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- max_irr_updated =
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+ got_posted_interrupt =
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kvm_apic_update_irr(vcpu, vmx->pi_desc.pir, &max_irr);
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-
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- /*
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- * If we are running L2 and L1 has a new pending interrupt
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- * which can be injected, this may cause a vmexit or it may
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- * be injected into L2. Either way, this interrupt will be
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- * processed via KVM_REQ_EVENT, not RVI, because we do not use
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- * virtual interrupt delivery to inject L1 interrupts into L2.
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- */
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- if (is_guest_mode(vcpu) && max_irr_updated)
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- kvm_make_request(KVM_REQ_EVENT, vcpu);
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} else {
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max_irr = kvm_lapic_find_highest_irr(vcpu);
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+ got_posted_interrupt = false;
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}
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- vmx_hwapic_irr_update(vcpu, max_irr);
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+
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+ /*
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+ * Newly recognized interrupts are injected via either virtual interrupt
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+ * delivery (RVI) or KVM_REQ_EVENT. Virtual interrupt delivery is
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+ * disabled in two cases:
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+ *
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+ * 1) If L2 is running and the vCPU has a new pending interrupt. If L1
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+ * wants to exit on interrupts, KVM_REQ_EVENT is needed to synthesize a
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+ * VM-Exit to L1. If L1 doesn't want to exit, the interrupt is injected
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+ * into L2, but KVM doesn't use virtual interrupt delivery to inject
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+ * interrupts into L2, and so KVM_REQ_EVENT is again needed.
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+ *
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+ * 2) If APICv is disabled for this vCPU, assigned devices may still
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+ * attempt to post interrupts. The posted interrupt vector will cause
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+ * a VM-Exit and the subsequent entry will call sync_pir_to_irr.
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+ */
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+ if (!is_guest_mode(vcpu) && kvm_vcpu_apicv_active(vcpu))
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+ vmx_set_rvi(max_irr);
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+ else if (got_posted_interrupt)
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+ kvm_make_request(KVM_REQ_EVENT, vcpu);
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+
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return max_irr;
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}
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