2022-07-27 14:45:07 +03:00
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Maxim Levitsky <mlevitsk@redhat.com>
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2022-08-08 16:08:52 +03:00
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Date: Wed, 3 Aug 2022 18:50:07 +0300
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2022-07-27 14:45:07 +03:00
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Subject: [PATCH] KVM: x86: emulator/smm: use smram struct for 32 bit smram
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load/restore
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Use kvm_smram_state_32 struct to save/restore 32 bit SMM state
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(used when X86_FEATURE_LM is not present in the guest CPUID).
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Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
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Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
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---
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arch/x86/kvm/emulate.c | 81 +++++++++++++++---------------------------
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arch/x86/kvm/x86.c | 75 +++++++++++++++++---------------------
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2 files changed, 60 insertions(+), 96 deletions(-)
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diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
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2022-12-14 16:07:12 +03:00
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index d3cc1b8e2ea6..0dd18d66f3b7 100644
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2022-07-27 14:45:07 +03:00
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--- a/arch/x86/kvm/emulate.c
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+++ b/arch/x86/kvm/emulate.c
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2022-10-13 11:28:51 +03:00
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@@ -2343,25 +2343,17 @@ static void rsm_set_desc_flags(struct desc_struct *desc, u32 flags)
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2022-07-27 14:45:07 +03:00
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desc->type = (flags >> 8) & 15;
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}
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-static int rsm_load_seg_32(struct x86_emulate_ctxt *ctxt, const char *smstate,
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+static void rsm_load_seg_32(struct x86_emulate_ctxt *ctxt,
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2022-08-08 16:08:52 +03:00
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+ const struct kvm_smm_seg_state_32 *state,
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2022-07-27 14:45:07 +03:00
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+ u16 selector,
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int n)
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{
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struct desc_struct desc;
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- int offset;
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- u16 selector;
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-
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- selector = GET_SMSTATE(u32, smstate, 0x7fa8 + n * 4);
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-
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- if (n < 3)
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- offset = 0x7f84 + n * 12;
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- else
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- offset = 0x7f2c + (n - 3) * 12;
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- set_desc_base(&desc, GET_SMSTATE(u32, smstate, offset + 8));
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- set_desc_limit(&desc, GET_SMSTATE(u32, smstate, offset + 4));
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- rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, offset));
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+ set_desc_base(&desc, state->base);
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+ set_desc_limit(&desc, state->limit);
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+ rsm_set_desc_flags(&desc, state->flags);
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ctxt->ops->set_segment(ctxt, selector, &desc, 0, n);
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- return X86EMUL_CONTINUE;
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}
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#ifdef CONFIG_X86_64
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2022-10-13 11:28:51 +03:00
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@@ -2432,63 +2424,46 @@ static int rsm_enter_protected_mode(struct x86_emulate_ctxt *ctxt,
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2022-07-27 14:45:07 +03:00
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}
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static int rsm_load_state_32(struct x86_emulate_ctxt *ctxt,
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- const char *smstate)
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2022-08-08 16:08:52 +03:00
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+ const struct kvm_smram_state_32 *smstate)
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2022-07-27 14:45:07 +03:00
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{
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- struct desc_struct desc;
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struct desc_ptr dt;
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- u16 selector;
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- u32 val, cr0, cr3, cr4;
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int i;
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- cr0 = GET_SMSTATE(u32, smstate, 0x7ffc);
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- cr3 = GET_SMSTATE(u32, smstate, 0x7ff8);
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- ctxt->eflags = GET_SMSTATE(u32, smstate, 0x7ff4) | X86_EFLAGS_FIXED;
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- ctxt->_eip = GET_SMSTATE(u32, smstate, 0x7ff0);
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+ ctxt->eflags = smstate->eflags | X86_EFLAGS_FIXED;
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+ ctxt->_eip = smstate->eip;
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for (i = 0; i < 8; i++)
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- *reg_write(ctxt, i) = GET_SMSTATE(u32, smstate, 0x7fd0 + i * 4);
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-
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- val = GET_SMSTATE(u32, smstate, 0x7fcc);
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+ *reg_write(ctxt, i) = smstate->gprs[i];
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- if (ctxt->ops->set_dr(ctxt, 6, val))
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+ if (ctxt->ops->set_dr(ctxt, 6, smstate->dr6))
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return X86EMUL_UNHANDLEABLE;
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-
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- val = GET_SMSTATE(u32, smstate, 0x7fc8);
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-
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- if (ctxt->ops->set_dr(ctxt, 7, val))
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+ if (ctxt->ops->set_dr(ctxt, 7, smstate->dr7))
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return X86EMUL_UNHANDLEABLE;
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- selector = GET_SMSTATE(u32, smstate, 0x7fc4);
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- set_desc_base(&desc, GET_SMSTATE(u32, smstate, 0x7f64));
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- set_desc_limit(&desc, GET_SMSTATE(u32, smstate, 0x7f60));
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- rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7f5c));
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- ctxt->ops->set_segment(ctxt, selector, &desc, 0, VCPU_SREG_TR);
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+ rsm_load_seg_32(ctxt, &smstate->tr, smstate->tr_sel, VCPU_SREG_TR);
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+ rsm_load_seg_32(ctxt, &smstate->ldtr, smstate->ldtr_sel, VCPU_SREG_LDTR);
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- selector = GET_SMSTATE(u32, smstate, 0x7fc0);
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- set_desc_base(&desc, GET_SMSTATE(u32, smstate, 0x7f80));
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- set_desc_limit(&desc, GET_SMSTATE(u32, smstate, 0x7f7c));
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- rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7f78));
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- ctxt->ops->set_segment(ctxt, selector, &desc, 0, VCPU_SREG_LDTR);
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- dt.address = GET_SMSTATE(u32, smstate, 0x7f74);
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- dt.size = GET_SMSTATE(u32, smstate, 0x7f70);
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+ dt.address = smstate->gdtr.base;
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+ dt.size = smstate->gdtr.limit;
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ctxt->ops->set_gdt(ctxt, &dt);
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- dt.address = GET_SMSTATE(u32, smstate, 0x7f58);
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- dt.size = GET_SMSTATE(u32, smstate, 0x7f54);
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+ dt.address = smstate->idtr.base;
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+ dt.size = smstate->idtr.limit;
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ctxt->ops->set_idt(ctxt, &dt);
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- for (i = 0; i < 6; i++) {
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- int r = rsm_load_seg_32(ctxt, smstate, i);
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- if (r != X86EMUL_CONTINUE)
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- return r;
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- }
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+ rsm_load_seg_32(ctxt, &smstate->es, smstate->es_sel, VCPU_SREG_ES);
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+ rsm_load_seg_32(ctxt, &smstate->cs, smstate->cs_sel, VCPU_SREG_CS);
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+ rsm_load_seg_32(ctxt, &smstate->ss, smstate->ss_sel, VCPU_SREG_SS);
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- cr4 = GET_SMSTATE(u32, smstate, 0x7f14);
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+ rsm_load_seg_32(ctxt, &smstate->ds, smstate->ds_sel, VCPU_SREG_DS);
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+ rsm_load_seg_32(ctxt, &smstate->fs, smstate->fs_sel, VCPU_SREG_FS);
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+ rsm_load_seg_32(ctxt, &smstate->gs, smstate->gs_sel, VCPU_SREG_GS);
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- ctxt->ops->set_smbase(ctxt, GET_SMSTATE(u32, smstate, 0x7ef8));
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+ ctxt->ops->set_smbase(ctxt, smstate->smbase);
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- return rsm_enter_protected_mode(ctxt, cr0, cr3, cr4);
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+ return rsm_enter_protected_mode(ctxt, smstate->cr0,
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+ smstate->cr3, smstate->cr4);
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}
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#ifdef CONFIG_X86_64
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2022-10-13 11:28:51 +03:00
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@@ -2635,7 +2610,7 @@ static int em_rsm(struct x86_emulate_ctxt *ctxt)
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2022-08-08 16:08:52 +03:00
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ret = rsm_load_state_64(ctxt, (const char *)&smram);
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2022-07-27 14:45:07 +03:00
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else
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#endif
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2022-08-08 16:08:52 +03:00
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- ret = rsm_load_state_32(ctxt, (const char *)&smram);
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+ ret = rsm_load_state_32(ctxt, &smram.smram32);
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2022-07-27 14:45:07 +03:00
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if (ret != X86EMUL_CONTINUE)
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goto emulate_shutdown;
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diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
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2023-10-03 20:22:23 +03:00
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index e8a86fc933f4..cebe7406d9b8 100644
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2022-07-27 14:45:07 +03:00
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--- a/arch/x86/kvm/x86.c
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+++ b/arch/x86/kvm/x86.c
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2023-10-03 20:22:23 +03:00
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@@ -9189,22 +9189,18 @@ static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
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2022-07-27 14:45:07 +03:00
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return flags;
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}
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-static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
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+static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu,
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+ struct kvm_smm_seg_state_32 *state,
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+ u32 *selector,
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+ int n)
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{
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struct kvm_segment seg;
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- int offset;
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kvm_get_segment(vcpu, &seg, n);
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- put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
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-
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- if (n < 3)
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- offset = 0x7f84 + n * 12;
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- else
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- offset = 0x7f2c + (n - 3) * 12;
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-
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- put_smstate(u32, buf, offset + 8, seg.base);
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- put_smstate(u32, buf, offset + 4, seg.limit);
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- put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
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+ *selector = seg.selector;
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+ state->base = seg.base;
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+ state->limit = seg.limit;
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+ state->flags = enter_smm_get_segment_flags(&seg);
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}
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#ifdef CONFIG_X86_64
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2023-10-03 20:22:23 +03:00
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@@ -9225,54 +9221,47 @@ static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
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2022-07-27 14:45:07 +03:00
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}
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#endif
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-static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
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+static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, struct kvm_smram_state_32 *smram)
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{
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struct desc_ptr dt;
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- struct kvm_segment seg;
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unsigned long val;
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int i;
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- put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
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- put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
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- put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
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- put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
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+ smram->cr0 = kvm_read_cr0(vcpu);
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+ smram->cr3 = kvm_read_cr3(vcpu);
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+ smram->eflags = kvm_get_rflags(vcpu);
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+ smram->eip = kvm_rip_read(vcpu);
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for (i = 0; i < 8; i++)
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- put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
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+ smram->gprs[i] = kvm_register_read_raw(vcpu, i);
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kvm_get_dr(vcpu, 6, &val);
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- put_smstate(u32, buf, 0x7fcc, (u32)val);
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+ smram->dr6 = (u32)val;
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kvm_get_dr(vcpu, 7, &val);
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- put_smstate(u32, buf, 0x7fc8, (u32)val);
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+ smram->dr7 = (u32)val;
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- kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
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- put_smstate(u32, buf, 0x7fc4, seg.selector);
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- put_smstate(u32, buf, 0x7f64, seg.base);
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- put_smstate(u32, buf, 0x7f60, seg.limit);
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- put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
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-
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- kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
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- put_smstate(u32, buf, 0x7fc0, seg.selector);
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- put_smstate(u32, buf, 0x7f80, seg.base);
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- put_smstate(u32, buf, 0x7f7c, seg.limit);
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- put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
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+ enter_smm_save_seg_32(vcpu, &smram->tr, &smram->tr_sel, VCPU_SREG_TR);
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+ enter_smm_save_seg_32(vcpu, &smram->ldtr, &smram->ldtr_sel, VCPU_SREG_LDTR);
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static_call(kvm_x86_get_gdt)(vcpu, &dt);
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- put_smstate(u32, buf, 0x7f74, dt.address);
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- put_smstate(u32, buf, 0x7f70, dt.size);
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+ smram->gdtr.base = dt.address;
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+ smram->gdtr.limit = dt.size;
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static_call(kvm_x86_get_idt)(vcpu, &dt);
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- put_smstate(u32, buf, 0x7f58, dt.address);
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- put_smstate(u32, buf, 0x7f54, dt.size);
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+ smram->idtr.base = dt.address;
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+ smram->idtr.limit = dt.size;
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- for (i = 0; i < 6; i++)
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- enter_smm_save_seg_32(vcpu, buf, i);
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+ enter_smm_save_seg_32(vcpu, &smram->es, &smram->es_sel, VCPU_SREG_ES);
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+ enter_smm_save_seg_32(vcpu, &smram->cs, &smram->cs_sel, VCPU_SREG_CS);
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+ enter_smm_save_seg_32(vcpu, &smram->ss, &smram->ss_sel, VCPU_SREG_SS);
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- put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
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+ enter_smm_save_seg_32(vcpu, &smram->ds, &smram->ds_sel, VCPU_SREG_DS);
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+ enter_smm_save_seg_32(vcpu, &smram->fs, &smram->fs_sel, VCPU_SREG_FS);
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+ enter_smm_save_seg_32(vcpu, &smram->gs, &smram->gs_sel, VCPU_SREG_GS);
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- /* revision id */
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- put_smstate(u32, buf, 0x7efc, 0x00020000);
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- put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
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+ smram->cr4 = kvm_read_cr4(vcpu);
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+ smram->smm_revision = 0x00020000;
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+ smram->smbase = vcpu->arch.smbase;
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}
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#ifdef CONFIG_X86_64
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2023-10-03 20:22:23 +03:00
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@@ -9343,7 +9332,7 @@ static void enter_smm(struct kvm_vcpu *vcpu)
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2022-08-08 16:08:52 +03:00
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enter_smm_save_state_64(vcpu, (char *)&smram);
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2022-07-27 14:45:07 +03:00
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else
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#endif
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2022-08-08 16:08:52 +03:00
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- enter_smm_save_state_32(vcpu, (char *)&smram);
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+ enter_smm_save_state_32(vcpu, &smram.smram32);
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2022-07-27 14:45:07 +03:00
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/*
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* Give enter_smm() a chance to make ISA-specific changes to the vCPU
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