2022-07-27 14:45:07 +03:00
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Maxim Levitsky <mlevitsk@redhat.com>
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2022-08-08 16:08:52 +03:00
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Date: Wed, 3 Aug 2022 18:50:05 +0300
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2022-07-27 14:45:07 +03:00
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Subject: [PATCH] KVM: x86: emulator/smm: add structs for KVM's smram layout
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Those structs will be used to read/write the smram state image.
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Also document the differences between KVM's SMRAM layout and SMRAM
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layout that is used by real Intel/AMD cpus.
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Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
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Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
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---
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2022-08-08 16:08:52 +03:00
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arch/x86/kvm/emulate.c | 6 +
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arch/x86/kvm/kvm_emulate.h | 218 +++++++++++++++++++++++++++++++++++++
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arch/x86/kvm/x86.c | 1 +
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3 files changed, 225 insertions(+)
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2022-07-27 14:45:07 +03:00
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2022-08-08 16:08:52 +03:00
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diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
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2022-06-21 10:18:44 +03:00
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index 874d124438d1..bf1238152318 100644
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2022-08-08 16:08:52 +03:00
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--- a/arch/x86/kvm/emulate.c
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+++ b/arch/x86/kvm/emulate.c
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2022-06-21 10:18:44 +03:00
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@@ -5850,3 +5850,9 @@ bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt)
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2022-08-08 16:08:52 +03:00
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return true;
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}
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+
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+void __init kvm_emulator_init(void)
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+{
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+ __check_smram32_offsets();
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+ __check_smram64_offsets();
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+}
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2022-07-27 14:45:07 +03:00
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diff --git a/arch/x86/kvm/kvm_emulate.h b/arch/x86/kvm/kvm_emulate.h
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2022-06-21 10:18:44 +03:00
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index 8dff25d267b7..0eb13204bbc2 100644
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2022-07-27 14:45:07 +03:00
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--- a/arch/x86/kvm/kvm_emulate.h
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+++ b/arch/x86/kvm/kvm_emulate.h
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2022-08-08 16:08:52 +03:00
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@@ -13,6 +13,7 @@
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#define _ASM_X86_KVM_X86_EMULATE_H
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#include <asm/desc_defs.h>
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+#include <linux/build_bug.h>
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#include "fpu.h"
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struct x86_emulate_ctxt;
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2022-06-21 10:18:44 +03:00
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@@ -481,6 +482,223 @@ enum x86_intercept {
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2022-07-27 14:45:07 +03:00
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nr_x86_intercepts
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};
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+
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2022-08-08 16:08:52 +03:00
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+/* 32 bit KVM's emulated SMM layout. Loosely based on Intel's layout */
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2022-07-27 14:45:07 +03:00
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+
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+struct kvm_smm_seg_state_32 {
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+ u32 flags;
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+ u32 limit;
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+ u32 base;
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+} __packed;
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+
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+struct kvm_smram_state_32 {
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2022-08-08 16:08:52 +03:00
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+ u32 reserved1[62];
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+ u32 smbase;
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+ u32 smm_revision;
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+ u32 reserved2[5];
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+ u32 cr4; /* CR4 is not present in Intel/AMD SMRAM image */
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+ u32 reserved3[5];
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2022-07-27 14:45:07 +03:00
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+
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+ /*
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2022-08-08 16:08:52 +03:00
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+ * Segment state is not present/documented in the Intel/AMD SMRAM image
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+ * Instead this area on Intel/AMD contains IO/HLT restart flags.
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2022-07-27 14:45:07 +03:00
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+ */
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2022-08-08 16:08:52 +03:00
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+ struct kvm_smm_seg_state_32 ds;
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+ struct kvm_smm_seg_state_32 fs;
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+ struct kvm_smm_seg_state_32 gs;
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+ struct kvm_smm_seg_state_32 idtr; /* IDTR has only base and limit */
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+ struct kvm_smm_seg_state_32 tr;
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+ u32 reserved;
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+ struct kvm_smm_seg_state_32 gdtr; /* GDTR has only base and limit */
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+ struct kvm_smm_seg_state_32 ldtr;
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+ struct kvm_smm_seg_state_32 es;
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+ struct kvm_smm_seg_state_32 cs;
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+ struct kvm_smm_seg_state_32 ss;
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+
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+ u32 es_sel;
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+ u32 cs_sel;
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+ u32 ss_sel;
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+ u32 ds_sel;
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+ u32 fs_sel;
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+ u32 gs_sel;
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+ u32 ldtr_sel;
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+ u32 tr_sel;
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+
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+ u32 dr7;
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+ u32 dr6;
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+ u32 gprs[8]; /* GPRS in the "natural" X86 order (EAX/ECX/EDX.../EDI) */
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+ u32 eip;
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+ u32 eflags;
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+ u32 cr3;
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+ u32 cr0;
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2022-07-27 14:45:07 +03:00
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+} __packed;
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+
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2022-08-08 16:08:52 +03:00
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+
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+static inline void __check_smram32_offsets(void)
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+{
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+#define __CHECK_SMRAM32_OFFSET(field, offset) \
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+ ASSERT_STRUCT_OFFSET(struct kvm_smram_state_32, field, offset - 0xFE00)
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+
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+ __CHECK_SMRAM32_OFFSET(reserved1, 0xFE00);
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+ __CHECK_SMRAM32_OFFSET(smbase, 0xFEF8);
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+ __CHECK_SMRAM32_OFFSET(smm_revision, 0xFEFC);
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+ __CHECK_SMRAM32_OFFSET(reserved2, 0xFF00);
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+ __CHECK_SMRAM32_OFFSET(cr4, 0xFF14);
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+ __CHECK_SMRAM32_OFFSET(reserved3, 0xFF18);
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+ __CHECK_SMRAM32_OFFSET(ds, 0xFF2C);
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+ __CHECK_SMRAM32_OFFSET(fs, 0xFF38);
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+ __CHECK_SMRAM32_OFFSET(gs, 0xFF44);
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+ __CHECK_SMRAM32_OFFSET(idtr, 0xFF50);
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+ __CHECK_SMRAM32_OFFSET(tr, 0xFF5C);
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+ __CHECK_SMRAM32_OFFSET(gdtr, 0xFF6C);
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+ __CHECK_SMRAM32_OFFSET(ldtr, 0xFF78);
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+ __CHECK_SMRAM32_OFFSET(es, 0xFF84);
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+ __CHECK_SMRAM32_OFFSET(cs, 0xFF90);
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+ __CHECK_SMRAM32_OFFSET(ss, 0xFF9C);
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+ __CHECK_SMRAM32_OFFSET(es_sel, 0xFFA8);
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+ __CHECK_SMRAM32_OFFSET(cs_sel, 0xFFAC);
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+ __CHECK_SMRAM32_OFFSET(ss_sel, 0xFFB0);
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+ __CHECK_SMRAM32_OFFSET(ds_sel, 0xFFB4);
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+ __CHECK_SMRAM32_OFFSET(fs_sel, 0xFFB8);
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+ __CHECK_SMRAM32_OFFSET(gs_sel, 0xFFBC);
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+ __CHECK_SMRAM32_OFFSET(ldtr_sel, 0xFFC0);
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+ __CHECK_SMRAM32_OFFSET(tr_sel, 0xFFC4);
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+ __CHECK_SMRAM32_OFFSET(dr7, 0xFFC8);
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+ __CHECK_SMRAM32_OFFSET(dr6, 0xFFCC);
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+ __CHECK_SMRAM32_OFFSET(gprs, 0xFFD0);
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+ __CHECK_SMRAM32_OFFSET(eip, 0xFFF0);
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+ __CHECK_SMRAM32_OFFSET(eflags, 0xFFF4);
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+ __CHECK_SMRAM32_OFFSET(cr3, 0xFFF8);
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+ __CHECK_SMRAM32_OFFSET(cr0, 0xFFFC);
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+#undef __CHECK_SMRAM32_OFFSET
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+}
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+
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+
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+/* 64 bit KVM's emulated SMM layout. Based on AMD64 layout */
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2022-07-27 14:45:07 +03:00
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+
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+struct kvm_smm_seg_state_64 {
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+ u16 selector;
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+ u16 attributes;
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+ u32 limit;
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+ u64 base;
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+};
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+
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+struct kvm_smram_state_64 {
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+
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2022-08-08 16:08:52 +03:00
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+ struct kvm_smm_seg_state_64 es;
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+ struct kvm_smm_seg_state_64 cs;
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+ struct kvm_smm_seg_state_64 ss;
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+ struct kvm_smm_seg_state_64 ds;
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+ struct kvm_smm_seg_state_64 fs;
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+ struct kvm_smm_seg_state_64 gs;
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+ struct kvm_smm_seg_state_64 gdtr; /* GDTR has only base and limit*/
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+ struct kvm_smm_seg_state_64 ldtr;
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+ struct kvm_smm_seg_state_64 idtr; /* IDTR has only base and limit*/
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+ struct kvm_smm_seg_state_64 tr;
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2022-07-27 14:45:07 +03:00
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+
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+ /* I/O restart and auto halt restart are not implemented by KVM */
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2022-08-08 16:08:52 +03:00
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+ u64 io_restart_rip;
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+ u64 io_restart_rcx;
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+ u64 io_restart_rsi;
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+ u64 io_restart_rdi;
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+ u32 io_restart_dword;
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+ u32 reserved1;
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+ u8 io_inst_restart;
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+ u8 auto_hlt_restart;
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+ u8 reserved2[6];
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+
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+ u64 efer;
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2022-07-27 14:45:07 +03:00
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+
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+ /*
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2022-08-08 16:08:52 +03:00
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+ * Two fields below are implemented on AMD only, to store
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+ * SVM guest vmcb address if the #SMI was received while in the guest mode.
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2022-07-27 14:45:07 +03:00
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+ */
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2022-08-08 16:08:52 +03:00
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+ u64 svm_guest_flag;
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+ u64 svm_guest_vmcb_gpa;
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+ u64 svm_guest_virtual_int; /* unknown purpose, not implemented */
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2022-07-27 14:45:07 +03:00
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+
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2022-08-08 16:08:52 +03:00
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+ u32 reserved3[3];
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+ u32 smm_revison;
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+ u32 smbase;
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+ u32 reserved4[5];
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2022-07-27 14:45:07 +03:00
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+
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2022-08-08 16:08:52 +03:00
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+ /* ssp and svm_* fields below are not implemented by KVM */
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+ u64 ssp;
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+ u64 svm_guest_pat;
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+ u64 svm_host_efer;
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+ u64 svm_host_cr4;
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+ u64 svm_host_cr3;
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+ u64 svm_host_cr0;
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2022-07-27 14:45:07 +03:00
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+
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2022-08-08 16:08:52 +03:00
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+ u64 cr4;
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+ u64 cr3;
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+ u64 cr0;
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+ u64 dr7;
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+ u64 dr6;
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+ u64 rflags;
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+ u64 rip;
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+ u64 gprs[16]; /* GPRS in a reversed "natural" X86 order (R15/R14/../RCX/RAX.) */
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+};
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2022-07-27 14:45:07 +03:00
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+
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+
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2022-08-08 16:08:52 +03:00
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+static inline void __check_smram64_offsets(void)
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+{
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+#define __CHECK_SMRAM64_OFFSET(field, offset) \
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+ ASSERT_STRUCT_OFFSET(struct kvm_smram_state_64, field, offset - 0xFE00)
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2022-07-27 14:45:07 +03:00
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+
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2022-08-08 16:08:52 +03:00
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+ __CHECK_SMRAM64_OFFSET(es, 0xFE00);
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+ __CHECK_SMRAM64_OFFSET(cs, 0xFE10);
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+ __CHECK_SMRAM64_OFFSET(ss, 0xFE20);
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+ __CHECK_SMRAM64_OFFSET(ds, 0xFE30);
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+ __CHECK_SMRAM64_OFFSET(fs, 0xFE40);
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+ __CHECK_SMRAM64_OFFSET(gs, 0xFE50);
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+ __CHECK_SMRAM64_OFFSET(gdtr, 0xFE60);
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+ __CHECK_SMRAM64_OFFSET(ldtr, 0xFE70);
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+ __CHECK_SMRAM64_OFFSET(idtr, 0xFE80);
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+ __CHECK_SMRAM64_OFFSET(tr, 0xFE90);
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+ __CHECK_SMRAM64_OFFSET(io_restart_rip, 0xFEA0);
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+ __CHECK_SMRAM64_OFFSET(io_restart_rcx, 0xFEA8);
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+ __CHECK_SMRAM64_OFFSET(io_restart_rsi, 0xFEB0);
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+ __CHECK_SMRAM64_OFFSET(io_restart_rdi, 0xFEB8);
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+ __CHECK_SMRAM64_OFFSET(io_restart_dword, 0xFEC0);
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+ __CHECK_SMRAM64_OFFSET(reserved1, 0xFEC4);
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+ __CHECK_SMRAM64_OFFSET(io_inst_restart, 0xFEC8);
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+ __CHECK_SMRAM64_OFFSET(auto_hlt_restart, 0xFEC9);
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+ __CHECK_SMRAM64_OFFSET(reserved2, 0xFECA);
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+ __CHECK_SMRAM64_OFFSET(efer, 0xFED0);
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+ __CHECK_SMRAM64_OFFSET(svm_guest_flag, 0xFED8);
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+ __CHECK_SMRAM64_OFFSET(svm_guest_vmcb_gpa, 0xFEE0);
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+ __CHECK_SMRAM64_OFFSET(svm_guest_virtual_int, 0xFEE8);
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+ __CHECK_SMRAM64_OFFSET(reserved3, 0xFEF0);
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+ __CHECK_SMRAM64_OFFSET(smm_revison, 0xFEFC);
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+ __CHECK_SMRAM64_OFFSET(smbase, 0xFF00);
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+ __CHECK_SMRAM64_OFFSET(reserved4, 0xFF04);
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+ __CHECK_SMRAM64_OFFSET(ssp, 0xFF18);
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+ __CHECK_SMRAM64_OFFSET(svm_guest_pat, 0xFF20);
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+ __CHECK_SMRAM64_OFFSET(svm_host_efer, 0xFF28);
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+ __CHECK_SMRAM64_OFFSET(svm_host_cr4, 0xFF30);
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+ __CHECK_SMRAM64_OFFSET(svm_host_cr3, 0xFF38);
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+ __CHECK_SMRAM64_OFFSET(svm_host_cr0, 0xFF40);
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+ __CHECK_SMRAM64_OFFSET(cr4, 0xFF48);
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+ __CHECK_SMRAM64_OFFSET(cr3, 0xFF50);
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+ __CHECK_SMRAM64_OFFSET(cr0, 0xFF58);
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+ __CHECK_SMRAM64_OFFSET(dr7, 0xFF60);
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+ __CHECK_SMRAM64_OFFSET(dr6, 0xFF68);
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+ __CHECK_SMRAM64_OFFSET(rflags, 0xFF70);
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+ __CHECK_SMRAM64_OFFSET(rip, 0xFF78);
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+ __CHECK_SMRAM64_OFFSET(gprs, 0xFF80);
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+#undef __CHECK_SMRAM64_OFFSET
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+}
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2022-07-27 14:45:07 +03:00
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+
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2022-08-08 16:08:52 +03:00
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+union kvm_smram {
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+ struct kvm_smram_state_64 smram64;
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+ struct kvm_smram_state_32 smram32;
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+ u8 bytes[512];
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2022-07-27 14:45:07 +03:00
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+};
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+
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2022-08-08 16:08:52 +03:00
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+void __init kvm_emulator_init(void);
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+
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2022-07-27 14:45:07 +03:00
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+
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/* Host execution mode. */
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#if defined(CONFIG_X86_32)
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#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
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2022-08-08 16:08:52 +03:00
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diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
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2022-06-21 10:18:44 +03:00
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index dbaff0c7c8c2..aec63cebe0b7 100644
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2022-08-08 16:08:52 +03:00
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--- a/arch/x86/kvm/x86.c
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+++ b/arch/x86/kvm/x86.c
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2022-06-21 10:18:44 +03:00
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@@ -13009,6 +13009,7 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
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2022-08-08 16:08:52 +03:00
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static int __init kvm_x86_init(void)
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{
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kvm_mmu_x86_module_init();
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+ kvm_emulator_init();
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return 0;
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}
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module_init(kvm_x86_init);
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