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d04c8a563c
This patch is another step towards updating the code to handle the 32-bit kernels which I have not been regularly testing. This changes do not really impact the common case I'm expected which is the latest kernel running on an x86_64 arch. Until the linux-2.6.31 kernel the x86 arch did not have support for 64-bit atomic operations. Additionally, the new atomic_compat.h support for this case was wrong because it embedded a spinlock in the atomic variable which must always and only be 64-bits total. To handle these 32-bit issues we now simply fall back to the --enable-atomic-spinlock implementation if the kernel does not provide the 64-bit atomic funcs. The second issue this patch addresses is the DEBUG_KMEM assumption that there will always be atomic64 funcs available. On 32-bit archs this may not be true, and actually that's just fine. In that case the kernel will will never be able to allocate more the 32-bits worth anyway. So just check if atomic64 funcs are available, if they are not it means this is a 32-bit machine and we can safely use atomic_t's instead.
235 lines
6.2 KiB
C
235 lines
6.2 KiB
C
/*
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* This file is part of the SPL: Solaris Porting Layer.
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*
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* Copyright (c) 2008 Lawrence Livermore National Security, LLC.
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* Produced at Lawrence Livermore National Laboratory
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* Written by:
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* Brian Behlendorf <behlendorf1@llnl.gov>,
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* Herb Wartens <wartens2@llnl.gov>,
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* Jim Garlick <garlick@llnl.gov>
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* UCRL-CODE-235197
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*
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* This is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#ifndef _SPL_ATOMIC_H
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#define _SPL_ATOMIC_H
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <sys/types.h>
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#ifndef HAVE_ATOMIC64_CMPXCHG
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#define atomic64_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
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#endif
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#ifndef HAVE_ATOMIC64_XCHG
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#define atomic64_xchg(v, n) (xchg(&((v)->counter), n))
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#endif
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/*
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* Two approaches to atomic operations are implemented each with its
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* own benefits are drawbacks imposed by the Solaris API. Neither
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* approach handles the issue of word breaking when using a 64-bit
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* atomic variable on a 32-bit arch. The Solaris API would need to
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* add an atomic read call to correctly support this.
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*
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* When ATOMIC_SPINLOCK is defined all atomic operations will be
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* serialized through global spin locks. This is bad for performance
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* but it does allow a simple generic implementation.
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*
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* When ATOMIC_SPINLOCK is not defined the Linux atomic operations
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* are used. This is safe as long as the core Linux implementation
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* doesn't change because we are relying on the fact that an atomic
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* type is really just a uint32 or uint64. If this changes at some
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* point in the future we need to fall-back to the spin approach.
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*/
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#ifdef ATOMIC_SPINLOCK
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extern spinlock_t atomic32_lock;
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extern spinlock_t atomic64_lock;
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static __inline__ void
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atomic_inc_32(volatile uint32_t *target)
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{
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spin_lock(&atomic32_lock);
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(*target)++;
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spin_unlock(&atomic32_lock);
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}
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static __inline__ void
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atomic_dec_32(volatile uint32_t *target)
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{
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spin_lock(&atomic32_lock);
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(*target)--;
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spin_unlock(&atomic32_lock);
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}
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static __inline__ void
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atomic_add_32(volatile uint32_t *target, int32_t delta)
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{
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spin_lock(&atomic32_lock);
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*target += delta;
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spin_unlock(&atomic32_lock);
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}
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static __inline__ void
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atomic_sub_32(volatile uint32_t *target, int32_t delta)
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{
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spin_lock(&atomic32_lock);
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*target -= delta;
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spin_unlock(&atomic32_lock);
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}
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static __inline__ uint32_t
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atomic_add_32_nv(volatile uint32_t *target, uint32_t delta)
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{
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spin_lock(&atomic32_lock);
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*target += delta;
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spin_unlock(&atomic32_lock);
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return *target;
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}
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static __inline__ uint32_t
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atomic_sub_32_nv(volatile uint32_t *target, uint32_t delta)
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{
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spin_lock(&atomic32_lock);
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*target -= delta;
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spin_unlock(&atomic32_lock);
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return *target;
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}
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static __inline__ uint32_t
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atomic_cas_32(volatile uint32_t *target, uint32_t cmp,
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uint32_t newval)
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{
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uint32_t rc;
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spin_lock(&atomic32_lock);
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rc = *target;
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if (*target == cmp)
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*target = newval;
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spin_unlock(&atomic32_lock);
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return rc;
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}
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static __inline__ void
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atomic_inc_64(volatile uint64_t *target)
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{
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spin_lock(&atomic64_lock);
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(*target)++;
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spin_unlock(&atomic64_lock);
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}
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static __inline__ void
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atomic_dec_64(volatile uint64_t *target)
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{
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spin_lock(&atomic64_lock);
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(*target)--;
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spin_unlock(&atomic64_lock);
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}
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static __inline__ void
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atomic_add_64(volatile uint64_t *target, uint64_t delta)
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{
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spin_lock(&atomic64_lock);
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*target += delta;
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spin_unlock(&atomic64_lock);
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}
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static __inline__ void
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atomic_sub_64(volatile uint64_t *target, uint64_t delta)
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{
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spin_lock(&atomic64_lock);
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*target -= delta;
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spin_unlock(&atomic64_lock);
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}
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static __inline__ uint64_t
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atomic_add_64_nv(volatile uint64_t *target, uint64_t delta)
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{
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spin_lock(&atomic64_lock);
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*target += delta;
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spin_unlock(&atomic64_lock);
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return *target;
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}
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static __inline__ uint64_t
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atomic_sub_64_nv(volatile uint64_t *target, uint64_t delta)
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{
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spin_lock(&atomic64_lock);
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*target -= delta;
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spin_unlock(&atomic64_lock);
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return *target;
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}
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static __inline__ uint64_t
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atomic_cas_64(volatile uint64_t *target, uint64_t cmp,
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uint64_t newval)
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{
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uint64_t rc;
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spin_lock(&atomic64_lock);
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rc = *target;
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if (*target == cmp)
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*target = newval;
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spin_unlock(&atomic64_lock);
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return rc;
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}
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#else /* ATOMIC_SPINLOCK */
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#define atomic_inc_32(v) atomic_inc((atomic_t *)(v))
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#define atomic_dec_32(v) atomic_dec((atomic_t *)(v))
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#define atomic_add_32(v, i) atomic_add((i), (atomic_t *)(v))
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#define atomic_sub_32(v, i) atomic_sub((i), (atomic_t *)(v))
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#define atomic_add_32_nv(v, i) atomic_add_return((i), (atomic_t *)(v))
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#define atomic_sub_32_nv(v, i) atomic_sub_return((i), (atomic_t *)(v))
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#define atomic_cas_32(v, x, y) atomic_cmpxchg((atomic_t *)(v), x, y)
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#define atomic_inc_64(v) atomic64_inc((atomic64_t *)(v))
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#define atomic_dec_64(v) atomic64_dec((atomic64_t *)(v))
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#define atomic_add_64(v, i) atomic64_add((i), (atomic64_t *)(v))
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#define atomic_sub_64(v, i) atomic64_sub((i), (atomic64_t *)(v))
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#define atomic_add_64_nv(v, i) atomic64_add_return((i), (atomic64_t *)(v))
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#define atomic_sub_64_nv(v, i) atomic64_sub_return((i), (atomic64_t *)(v))
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#define atomic_cas_64(v, x, y) atomic64_cmpxchg((atomic64_t *)(v), x, y)
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#endif /* ATOMIC_SPINLOCK */
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#ifdef _LP64
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static __inline__ void *
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atomic_cas_ptr(volatile void *target, void *cmp, void *newval)
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{
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return (void *)atomic_cas_64((volatile uint64_t *)target,
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(uint64_t)cmp, (uint64_t)newval);
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}
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#else /* _LP64 */
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static __inline__ void *
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atomic_cas_ptr(volatile void *target, void *cmp, void *newval)
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{
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return (void *)atomic_cas_32((volatile uint32_t *)target,
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(uint32_t)cmp, (uint32_t)newval);
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}
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#endif /* _LP64 */
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#endif /* _SPL_ATOMIC_H */
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