mirror_zfs/include/asm/atomic_compat.h
behlendo 550f170525 Apply two nice improvements caught by Ricardo,
spl-05-div64.patch
This is a much less intrusive fix for undefined 64-bit division symbols
when compiling the DMU in 32-bit kernels.

* spl-06-atomic64.patch
This is a workaround for 32-bit kernels that don't have atomic64_t.



git-svn-id: https://outreach.scidac.gov/svn/spl/trunk@162 7e1ea52c-4ff2-0310-8f11-9dd32ca42a1c
2008-11-03 20:34:17 +00:00

59 lines
1.0 KiB
C

#ifndef _SPL_ATOMIC_COMPAT_H
#define _SPL_ATOMIC_COMPAT_H
#include <asm/atomic.h>
#ifndef HAVE_ATOMIC64_T
#include <linux/spinlock.h>
typedef struct {
spinlock_t lock;
__s64 val;
} atomic64_t;
#define ATOMIC64_INIT(i) { .lock = SPIN_LOCK_UNLOCKED, .val = (i) }
static inline void atomic64_add(__s64 i, atomic64_t *v)
{
unsigned long flags;
spin_lock_irqsave(&v->lock, flags);
v->val += i;
spin_unlock_irqrestore(&v->lock, flags);
}
static inline void atomic64_sub(__s64 i, atomic64_t *v)
{
unsigned long flags;
spin_lock_irqsave(&v->lock, flags);
v->val -= i;
spin_unlock_irqrestore(&v->lock, flags);
}
static inline __s64 atomic64_read(atomic64_t *v)
{
unsigned long flags;
__s64 r;
spin_lock_irqsave(&v->lock, flags);
r = v->val;
spin_unlock_irqrestore(&v->lock, flags);
return r;
}
static inline void atomic64_set(atomic64_t *v, __s64 i)
{
unsigned long flags;
spin_lock_irqsave(&v->lock, flags);
v->val = i;
spin_unlock_irqrestore(&v->lock, flags);
}
#endif /* HAVE_ATOMIC64_T */
#endif /* _SPL_ATOMIC_COMPAT_H */