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550f170525
spl-05-div64.patch This is a much less intrusive fix for undefined 64-bit division symbols when compiling the DMU in 32-bit kernels. * spl-06-atomic64.patch This is a workaround for 32-bit kernels that don't have atomic64_t. git-svn-id: https://outreach.scidac.gov/svn/spl/trunk@162 7e1ea52c-4ff2-0310-8f11-9dd32ca42a1c
59 lines
1.0 KiB
C
59 lines
1.0 KiB
C
#ifndef _SPL_ATOMIC_COMPAT_H
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#define _SPL_ATOMIC_COMPAT_H
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#include <asm/atomic.h>
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#ifndef HAVE_ATOMIC64_T
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#include <linux/spinlock.h>
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typedef struct {
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spinlock_t lock;
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__s64 val;
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} atomic64_t;
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#define ATOMIC64_INIT(i) { .lock = SPIN_LOCK_UNLOCKED, .val = (i) }
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static inline void atomic64_add(__s64 i, atomic64_t *v)
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{
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unsigned long flags;
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spin_lock_irqsave(&v->lock, flags);
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v->val += i;
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spin_unlock_irqrestore(&v->lock, flags);
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}
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static inline void atomic64_sub(__s64 i, atomic64_t *v)
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{
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unsigned long flags;
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spin_lock_irqsave(&v->lock, flags);
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v->val -= i;
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spin_unlock_irqrestore(&v->lock, flags);
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}
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static inline __s64 atomic64_read(atomic64_t *v)
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{
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unsigned long flags;
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__s64 r;
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spin_lock_irqsave(&v->lock, flags);
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r = v->val;
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spin_unlock_irqrestore(&v->lock, flags);
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return r;
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}
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static inline void atomic64_set(atomic64_t *v, __s64 i)
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{
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unsigned long flags;
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spin_lock_irqsave(&v->lock, flags);
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v->val = i;
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spin_unlock_irqrestore(&v->lock, flags);
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}
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#endif /* HAVE_ATOMIC64_T */
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#endif /* _SPL_ATOMIC_COMPAT_H */
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