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010d12474c
- Add two new module parameters to icp (icp_aes_impl, icp_gcm_impl) that control the crypto implementation. At the moment there is a choice between generic and aesni (on platforms that support it). - This enables support for AES-NI and PCLMULQDQ-NI on AMD Family 15h (bulldozer) and newer CPUs (zen). - Modify aes_key_t to track what implementation it was generated with as key schedules generated with various implementations are not necessarily interchangable. Reviewed by: Gvozden Neskovic <neskovic@gmail.com> Reviewed-by: Brian Behlendorf <behlendorf1@llnl.gov> Reviewed-by: Tom Caputi <tcaputi@datto.com> Reviewed-by: Richard Laager <rlaager@wiktel.com> Signed-off-by: Nathaniel R. Lewis <linux.robotdude@gmail.com> Closes #7102 Closes #7103
255 lines
7.2 KiB
ArmAsm
255 lines
7.2 KiB
ArmAsm
/*
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* CDDL HEADER START
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*
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* The contents of this file are subject to the terms of the
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* Common Development and Distribution License (the "License").
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* You may not use this file except in compliance with the License.
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*
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* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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* or http://www.opensolaris.org/os/licensing.
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* See the License for the specific language governing permissions
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* and limitations under the License.
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*
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* When distributing Covered Code, include this CDDL HEADER in each
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* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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* If applicable, add the following below this CDDL HEADER, with the
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* fields enclosed by brackets "[]" replaced with your own identifying
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* information: Portions Copyright [yyyy] [name of copyright owner]
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*
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* CDDL HEADER END
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*/
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/*
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* Copyright (c) 2009 Intel Corporation
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* All Rights Reserved.
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*/
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/*
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* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
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* Use is subject to license terms.
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*/
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/*
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* Accelerated GHASH implementation with Intel PCLMULQDQ-NI
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* instructions. This file contains an accelerated
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* Galois Field Multiplication implementation.
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*
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* PCLMULQDQ is used to accelerate the most time-consuming part of GHASH,
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* carry-less multiplication. More information about PCLMULQDQ can be
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* found at:
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* http://software.intel.com/en-us/articles/
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* carry-less-multiplication-and-its-usage-for-computing-the-gcm-mode/
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*
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*/
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/*
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* ====================================================================
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* OpenSolaris OS modifications
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*
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* This source originates as file galois_hash_asm.c from
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* Intel Corporation dated September 21, 2009.
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*
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* This OpenSolaris version has these major changes from the original source:
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*
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* 1. Added OpenSolaris ENTRY_NP/SET_SIZE macros from
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* /usr/include/sys/asm_linkage.h, lint(1B) guards, and a dummy C function
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* definition for lint.
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*
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* 2. Formatted code, added comments, and added #includes and #defines.
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*
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* 3. If bit CR0.TS is set, clear and set the TS bit, after and before
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* calling kpreempt_disable() and kpreempt_enable().
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* If the TS bit is not set, Save and restore %xmm registers at the beginning
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* and end of function calls (%xmm* registers are not saved and restored by
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* during kernel thread preemption).
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*
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* 4. Removed code to perform hashing. This is already done with C macro
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* GHASH in gcm.c. For better performance, this removed code should be
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* reintegrated in the future to replace the C GHASH macro.
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*
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* 5. Added code to byte swap 16-byte input and output.
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*
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* 6. Folded in comments from the original C source with embedded assembly
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* (SB_w_shift_xor.c)
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*
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* 7. Renamed function and reordered parameters to match OpenSolaris:
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* Intel interface:
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* void galois_hash_asm(unsigned char *hk, unsigned char *s,
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* unsigned char *d, int length)
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* OpenSolaris OS interface:
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* void gcm_mul_pclmulqdq(uint64_t *x_in, uint64_t *y, uint64_t *res);
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* ====================================================================
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*/
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#if defined(lint) || defined(__lint) /* lint */
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#include <sys/types.h>
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/* ARGSUSED */
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void
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gcm_mul_pclmulqdq(uint64_t *x_in, uint64_t *y, uint64_t *res) {
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}
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#elif defined(HAVE_PCLMULQDQ) /* guard by instruction set */
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#define _ASM
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#include <sys/asm_linkage.h>
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/*
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* Use this mask to byte-swap a 16-byte integer with the pshufb instruction
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*/
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// static uint8_t byte_swap16_mask[] = {
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// 15, 14, 13, 12, 11, 10, 9, 8, 7, 6 ,5, 4, 3, 2, 1, 0 };
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.data
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.align XMM_ALIGN
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.Lbyte_swap16_mask:
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.byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
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/*
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* void gcm_mul_pclmulqdq(uint64_t *x_in, uint64_t *y, uint64_t *res);
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*
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* Perform a carry-less multiplication (that is, use XOR instead of the
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* multiply operator) on P1 and P2 and place the result in P3.
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*
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* Byte swap the input and the output.
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*
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* Note: x_in, y, and res all point to a block of 20-byte numbers
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* (an array of two 64-bit integers).
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*
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* Note2: For kernel code, caller is responsible for ensuring
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* kpreempt_disable() has been called. This is because %xmm registers are
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* not saved/restored. Clear and set the CR0.TS bit on entry and exit,
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* respectively, if TS is set on entry. Otherwise, if TS is not set,
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* save and restore %xmm registers on the stack.
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*
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* Note3: Original Intel definition:
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* void galois_hash_asm(unsigned char *hk, unsigned char *s,
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* unsigned char *d, int length)
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*
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* Note4: Register/parameter mapping:
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* Intel:
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* Parameter 1: %rcx (copied to %xmm0) hk or x_in
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* Parameter 2: %rdx (copied to %xmm1) s or y
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* Parameter 3: %rdi (result) d or res
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* OpenSolaris:
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* Parameter 1: %rdi (copied to %xmm0) x_in
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* Parameter 2: %rsi (copied to %xmm1) y
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* Parameter 3: %rdx (result) res
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*/
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ENTRY_NP(gcm_mul_pclmulqdq)
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//
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// Copy Parameters
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//
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movdqu (%rdi), %xmm0 // P1
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movdqu (%rsi), %xmm1 // P2
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//
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// Byte swap 16-byte input
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//
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lea .Lbyte_swap16_mask(%rip), %rax
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movups (%rax), %xmm10
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pshufb %xmm10, %xmm0
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pshufb %xmm10, %xmm1
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//
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// Multiply with the hash key
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//
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movdqu %xmm0, %xmm3
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pclmulqdq $0, %xmm1, %xmm3 // xmm3 holds a0*b0
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movdqu %xmm0, %xmm4
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pclmulqdq $16, %xmm1, %xmm4 // xmm4 holds a0*b1
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movdqu %xmm0, %xmm5
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pclmulqdq $1, %xmm1, %xmm5 // xmm5 holds a1*b0
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movdqu %xmm0, %xmm6
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pclmulqdq $17, %xmm1, %xmm6 // xmm6 holds a1*b1
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pxor %xmm5, %xmm4 // xmm4 holds a0*b1 + a1*b0
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movdqu %xmm4, %xmm5 // move the contents of xmm4 to xmm5
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psrldq $8, %xmm4 // shift by xmm4 64 bits to the right
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pslldq $8, %xmm5 // shift by xmm5 64 bits to the left
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pxor %xmm5, %xmm3
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pxor %xmm4, %xmm6 // Register pair <xmm6:xmm3> holds the result
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// of the carry-less multiplication of
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// xmm0 by xmm1.
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// We shift the result of the multiplication by one bit position
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// to the left to cope for the fact that the bits are reversed.
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movdqu %xmm3, %xmm7
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movdqu %xmm6, %xmm8
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pslld $1, %xmm3
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pslld $1, %xmm6
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psrld $31, %xmm7
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psrld $31, %xmm8
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movdqu %xmm7, %xmm9
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pslldq $4, %xmm8
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pslldq $4, %xmm7
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psrldq $12, %xmm9
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por %xmm7, %xmm3
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por %xmm8, %xmm6
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por %xmm9, %xmm6
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//
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// First phase of the reduction
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//
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// Move xmm3 into xmm7, xmm8, xmm9 in order to perform the shifts
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// independently.
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movdqu %xmm3, %xmm7
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movdqu %xmm3, %xmm8
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movdqu %xmm3, %xmm9
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pslld $31, %xmm7 // packed right shift shifting << 31
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pslld $30, %xmm8 // packed right shift shifting << 30
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pslld $25, %xmm9 // packed right shift shifting << 25
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pxor %xmm8, %xmm7 // xor the shifted versions
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pxor %xmm9, %xmm7
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movdqu %xmm7, %xmm8
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pslldq $12, %xmm7
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psrldq $4, %xmm8
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pxor %xmm7, %xmm3 // first phase of the reduction complete
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//
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// Second phase of the reduction
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//
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// Make 3 copies of xmm3 in xmm2, xmm4, xmm5 for doing these
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// shift operations.
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movdqu %xmm3, %xmm2
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movdqu %xmm3, %xmm4 // packed left shifting >> 1
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movdqu %xmm3, %xmm5
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psrld $1, %xmm2
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psrld $2, %xmm4 // packed left shifting >> 2
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psrld $7, %xmm5 // packed left shifting >> 7
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pxor %xmm4, %xmm2 // xor the shifted versions
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pxor %xmm5, %xmm2
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pxor %xmm8, %xmm2
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pxor %xmm2, %xmm3
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pxor %xmm3, %xmm6 // the result is in xmm6
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//
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// Byte swap 16-byte result
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//
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pshufb %xmm10, %xmm6 // %xmm10 has the swap mask
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//
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// Store the result
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//
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movdqu %xmm6, (%rdx) // P3
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//
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// Return
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//
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ret
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SET_SIZE(gcm_mul_pclmulqdq)
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#endif /* lint || __lint */
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#ifdef __ELF__
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.section .note.GNU-stack,"",%progbits
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#endif
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