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302b88e6ab
These functions didn't exist for all archs prior to 2.6.24. This
patch addes an autoconf test to detect this and add them when needed.
The autoconf check is needed instead of just an #ifndef because in
the most modern kernels atomic64_{cmp}xchg are implemented as in
inline function and not a #define.
68 lines
1.2 KiB
C
68 lines
1.2 KiB
C
#ifndef _SPL_ATOMIC_COMPAT_H
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#define _SPL_ATOMIC_COMPAT_H
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#include <asm/atomic.h>
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#include <spl_config.h>
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#ifndef HAVE_ATOMIC64_T
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#include <linux/spinlock.h>
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typedef struct {
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spinlock_t lock;
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__s64 val;
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} atomic64_t;
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#define ATOMIC64_INIT(i) { .lock = SPIN_LOCK_UNLOCKED, .val = (i) }
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static inline void atomic64_add(__s64 i, atomic64_t *v)
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{
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unsigned long flags;
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spin_lock_irqsave(&v->lock, flags);
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v->val += i;
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spin_unlock_irqrestore(&v->lock, flags);
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}
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static inline void atomic64_sub(__s64 i, atomic64_t *v)
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{
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unsigned long flags;
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spin_lock_irqsave(&v->lock, flags);
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v->val -= i;
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spin_unlock_irqrestore(&v->lock, flags);
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}
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static inline __s64 atomic64_read(atomic64_t *v)
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{
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unsigned long flags;
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__s64 r;
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spin_lock_irqsave(&v->lock, flags);
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r = v->val;
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spin_unlock_irqrestore(&v->lock, flags);
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return r;
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}
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static inline void atomic64_set(atomic64_t *v, __s64 i)
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{
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unsigned long flags;
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spin_lock_irqsave(&v->lock, flags);
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v->val = i;
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spin_unlock_irqrestore(&v->lock, flags);
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}
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#endif /* HAVE_ATOMIC64_T */
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#ifndef HAVE_ATOMIC64_CMPXCHG
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#define atomic64_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
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#endif
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#ifndef HAVE_ATOMIC64_XCHG
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#define atomic64_xchg(v, n) (xchg(&((v)->counter), n))
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#endif
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#endif /* _SPL_ATOMIC_COMPAT_H */
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