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48cf170d5a
Add needed cpu feature tests for powerpc architecture. Overview: zfs_altivec_available() - needed by RAID-Z zfs_vsx_available() - needed by BLAKE3 zfs_isa207_available() - needed by SHA2 Part 1 - Userspace - use getauxval() for Linux and elf_aux_info() for FreeBSD - direct including <sys/auxv.h> fails with double definitions - so we self define the needed functions and definitions Part 2 - Kernel space FreeBSD - use exported cpu_features of <powerpc/cpu.h> Part 3 - Kernel space Linux - use cpu_has_feature() function of <asm/cpufeature.h> Reviewed-by: Brian Behlendorf <behlendorf1@llnl.gov> Reviewed-by: Ryan Moeller <ryan@iXsystems.com> Signed-off-by: Tino Reichardt <milky-zfs@mcmilk.de> Closes #13725
298 lines
7.1 KiB
C
298 lines
7.1 KiB
C
/*
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* Copyright (c) 2020 iXsystems, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/types.h>
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#include <sys/cdefs.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <machine/pcb.h>
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#include <x86/x86_var.h>
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#include <x86/specialreg.h>
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#define kfpu_init() (0)
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#define kfpu_fini() do {} while (0)
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#define kfpu_allowed() 1
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#define kfpu_initialize(tsk) do {} while (0)
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#define kfpu_begin() { \
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if (__predict_false(!is_fpu_kern_thread(0))) \
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fpu_kern_enter(curthread, NULL, FPU_KERN_NOCTX);\
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}
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#define kfpu_end() { \
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if (__predict_false(curpcb->pcb_flags & PCB_FPUNOSAVE)) \
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fpu_kern_leave(curthread, NULL); \
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}
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/*
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* Check if OS supports AVX and AVX2 by checking XCR0
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* Only call this function if CPUID indicates that AVX feature is
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* supported by the CPU, otherwise it might be an illegal instruction.
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*/
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static inline uint64_t
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xgetbv(uint32_t index)
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{
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uint32_t eax, edx;
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/* xgetbv - instruction byte code */
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__asm__ __volatile__(".byte 0x0f; .byte 0x01; .byte 0xd0"
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: "=a" (eax), "=d" (edx)
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: "c" (index));
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return ((((uint64_t)edx)<<32) | (uint64_t)eax);
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}
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/*
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* Detect register set support
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*/
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static inline boolean_t
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__simd_state_enabled(const uint64_t state)
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{
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boolean_t has_osxsave;
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uint64_t xcr0;
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has_osxsave = (cpu_feature2 & CPUID2_OSXSAVE) != 0;
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if (!has_osxsave)
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return (B_FALSE);
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xcr0 = xgetbv(0);
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return ((xcr0 & state) == state);
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}
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#define _XSTATE_SSE_AVX (0x2 | 0x4)
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#define _XSTATE_AVX512 (0xE0 | _XSTATE_SSE_AVX)
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#define __ymm_enabled() __simd_state_enabled(_XSTATE_SSE_AVX)
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#define __zmm_enabled() __simd_state_enabled(_XSTATE_AVX512)
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/*
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* Check if SSE instruction set is available
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*/
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static inline boolean_t
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zfs_sse_available(void)
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{
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return ((cpu_feature & CPUID_SSE) != 0);
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}
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/*
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* Check if SSE2 instruction set is available
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*/
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static inline boolean_t
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zfs_sse2_available(void)
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{
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return ((cpu_feature & CPUID_SSE2) != 0);
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}
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/*
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* Check if SSE3 instruction set is available
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*/
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static inline boolean_t
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zfs_sse3_available(void)
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{
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return ((cpu_feature2 & CPUID2_SSE3) != 0);
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}
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/*
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* Check if SSSE3 instruction set is available
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*/
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static inline boolean_t
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zfs_ssse3_available(void)
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{
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return ((cpu_feature2 & CPUID2_SSSE3) != 0);
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}
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/*
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* Check if SSE4.1 instruction set is available
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*/
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static inline boolean_t
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zfs_sse4_1_available(void)
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{
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return ((cpu_feature2 & CPUID2_SSE41) != 0);
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}
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/*
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* Check if SSE4.2 instruction set is available
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*/
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static inline boolean_t
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zfs_sse4_2_available(void)
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{
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return ((cpu_feature2 & CPUID2_SSE42) != 0);
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}
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/*
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* Check if AVX instruction set is available
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*/
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static inline boolean_t
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zfs_avx_available(void)
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{
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boolean_t has_avx;
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has_avx = (cpu_feature2 & CPUID2_AVX) != 0;
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return (has_avx && __ymm_enabled());
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}
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/*
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* Check if AVX2 instruction set is available
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*/
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static inline boolean_t
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zfs_avx2_available(void)
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{
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boolean_t has_avx2;
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has_avx2 = (cpu_stdext_feature & CPUID_STDEXT_AVX2) != 0;
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return (has_avx2 && __ymm_enabled());
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}
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/*
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* AVX-512 family of instruction sets:
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*
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* AVX512F Foundation
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* AVX512CD Conflict Detection Instructions
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* AVX512ER Exponential and Reciprocal Instructions
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* AVX512PF Prefetch Instructions
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*
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* AVX512BW Byte and Word Instructions
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* AVX512DQ Double-word and Quadword Instructions
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* AVX512VL Vector Length Extensions
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*
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* AVX512IFMA Integer Fused Multiply Add (Not supported by kernel 4.4)
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* AVX512VBMI Vector Byte Manipulation Instructions
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*/
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/* Check if AVX512F instruction set is available */
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static inline boolean_t
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zfs_avx512f_available(void)
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{
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boolean_t has_avx512;
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has_avx512 = (cpu_stdext_feature & CPUID_STDEXT_AVX512F) != 0;
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512CD instruction set is available */
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static inline boolean_t
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zfs_avx512cd_available(void)
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{
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boolean_t has_avx512;
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has_avx512 = (cpu_stdext_feature & CPUID_STDEXT_AVX512F) != 0 &&
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(cpu_stdext_feature & CPUID_STDEXT_AVX512CD) != 0;
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512ER instruction set is available */
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static inline boolean_t
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zfs_avx512er_available(void)
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{
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boolean_t has_avx512;
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has_avx512 = (cpu_stdext_feature & CPUID_STDEXT_AVX512F) != 0 &&
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(cpu_stdext_feature & CPUID_STDEXT_AVX512CD) != 0;
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512PF instruction set is available */
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static inline boolean_t
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zfs_avx512pf_available(void)
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{
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boolean_t has_avx512;
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has_avx512 = (cpu_stdext_feature & CPUID_STDEXT_AVX512F) != 0 &&
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(cpu_stdext_feature & CPUID_STDEXT_AVX512PF) != 0;
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512BW instruction set is available */
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static inline boolean_t
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zfs_avx512bw_available(void)
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{
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boolean_t has_avx512 = B_FALSE;
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has_avx512 = (cpu_stdext_feature & CPUID_STDEXT_AVX512BW) != 0;
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512DQ instruction set is available */
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static inline boolean_t
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zfs_avx512dq_available(void)
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{
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boolean_t has_avx512;
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has_avx512 = (cpu_stdext_feature & CPUID_STDEXT_AVX512F) != 0 &&
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(cpu_stdext_feature & CPUID_STDEXT_AVX512DQ) != 0;
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512VL instruction set is available */
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static inline boolean_t
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zfs_avx512vl_available(void)
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{
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boolean_t has_avx512;
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has_avx512 = (cpu_stdext_feature & CPUID_STDEXT_AVX512F) != 0 &&
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(cpu_stdext_feature & CPUID_STDEXT_AVX512VL) != 0;
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512IFMA instruction set is available */
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static inline boolean_t
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zfs_avx512ifma_available(void)
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{
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boolean_t has_avx512;
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has_avx512 = (cpu_stdext_feature & CPUID_STDEXT_AVX512F) != 0 &&
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(cpu_stdext_feature & CPUID_STDEXT_AVX512IFMA) != 0;
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512VBMI instruction set is available */
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static inline boolean_t
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zfs_avx512vbmi_available(void)
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{
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boolean_t has_avx512;
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has_avx512 = (cpu_stdext_feature & CPUID_STDEXT_AVX512F) != 0 &&
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(cpu_stdext_feature & CPUID_STDEXT_BMI1) != 0;
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return (has_avx512 && __zmm_enabled());
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}
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