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dmu_tx_assign: make all VERIFY0 calls use DMU_TX_SUSPEND
This is the cheap way to keep non-user functions working after break-on-suspend becomes default. Sponsored-by: Klara, Inc. Sponsored-by: Wasabi Technology, Inc. Reviewed-by: Brian Behlendorf <behlendorf1@llnl.gov> Reviewed-by: Alexander Motin <mav@FreeBSD.org> Reviewed-by: Paul Dagnelie <paul.dagnelie@klarasystems.com> Signed-off-by: Rob Norris <rob.norris@klarasystems.com> Closes #17355
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4653e2f7d3
commit
55d035e866
@ -568,7 +568,7 @@ commit_rl_updates(objset_t *os, struct merge_data *md, uint64_t object,
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{
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{
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(os->os_spa)->dp_mos_dir);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(os->os_spa)->dp_mos_dir);
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dmu_tx_hold_space(tx, sizeof (struct redact_block_list_node));
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dmu_tx_hold_space(tx, sizeof (struct redact_block_list_node));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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uint64_t txg = dmu_tx_get_txg(tx);
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uint64_t txg = dmu_tx_get_txg(tx);
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if (!md->md_synctask_txg[txg & TXG_MASK]) {
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if (!md->md_synctask_txg[txg & TXG_MASK]) {
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dsl_sync_task_nowait(dmu_tx_pool(tx),
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dsl_sync_task_nowait(dmu_tx_pool(tx),
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@ -1437,7 +1437,7 @@ dsl_scan_restart_resilver(dsl_pool_t *dp, uint64_t txg)
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if (txg == 0) {
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if (txg == 0) {
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dmu_tx_t *tx;
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dmu_tx_t *tx;
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tx = dmu_tx_create_dd(dp->dp_mos_dir);
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tx = dmu_tx_create_dd(dp->dp_mos_dir);
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VERIFY(0 == dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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txg = dmu_tx_get_txg(tx);
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txg = dmu_tx_get_txg(tx);
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dp->dp_scan->scn_restart_txg = txg;
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dp->dp_scan->scn_restart_txg = txg;
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@ -58,7 +58,7 @@ dsl_sync_task_common(const char *pool, dsl_checkfunc_t *checkfunc,
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top:
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top:
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tx = dmu_tx_create_dd(dp->dp_mos_dir);
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tx = dmu_tx_create_dd(dp->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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dst.dst_pool = dp;
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dst.dst_pool = dp;
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dst.dst_txg = dmu_tx_get_txg(tx);
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dst.dst_txg = dmu_tx_get_txg(tx);
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@ -1984,7 +1984,7 @@ static void
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spa_unload_log_sm_flush_all(spa_t *spa)
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spa_unload_log_sm_flush_all(spa_t *spa)
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{
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{
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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ASSERT3U(spa->spa_log_flushall_txg, ==, 0);
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ASSERT3U(spa->spa_log_flushall_txg, ==, 0);
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spa->spa_log_flushall_txg = dmu_tx_get_txg(tx);
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spa->spa_log_flushall_txg = dmu_tx_get_txg(tx);
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@ -569,7 +569,7 @@ spa_condense_indirect_commit_entry(spa_t *spa,
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_hold_space(tx, sizeof (*vimep) + sizeof (count));
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dmu_tx_hold_space(tx, sizeof (*vimep) + sizeof (count));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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int txgoff = dmu_tx_get_txg(tx) & TXG_MASK;
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int txgoff = dmu_tx_get_txg(tx) & TXG_MASK;
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/*
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/*
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@ -158,7 +158,7 @@ vdev_initialize_change_state(vdev_t *vd, vdev_initializing_state_t new_state)
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vd->vdev_initialize_state = new_state;
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vd->vdev_initialize_state = new_state;
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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if (new_state != VDEV_INITIALIZE_NONE) {
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if (new_state != VDEV_INITIALIZE_NONE) {
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dsl_sync_task_nowait(spa_get_dsl(spa),
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dsl_sync_task_nowait(spa_get_dsl(spa),
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@ -250,7 +250,7 @@ vdev_initialize_write(vdev_t *vd, uint64_t start, uint64_t size, abd_t *data)
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mutex_exit(&vd->vdev_initialize_io_lock);
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mutex_exit(&vd->vdev_initialize_io_lock);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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uint64_t txg = dmu_tx_get_txg(tx);
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uint64_t txg = dmu_tx_get_txg(tx);
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spa_config_enter(spa, SCL_STATE_ALL, vd, RW_READER);
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spa_config_enter(spa, SCL_STATE_ALL, vd, RW_READER);
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@ -4652,7 +4652,8 @@ spa_raidz_expand_thread(void *arg, zthr_t *zthr)
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dmu_tx_t *tx =
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dmu_tx_t *tx =
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dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx,
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DMU_TX_WAIT | DMU_TX_SUSPEND));
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uint64_t txg = dmu_tx_get_txg(tx);
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uint64_t txg = dmu_tx_get_txg(tx);
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/*
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/*
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@ -287,7 +287,7 @@ vdev_rebuild_initiate(vdev_t *vd)
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ASSERT(!vd->vdev_rebuilding);
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ASSERT(!vd->vdev_rebuilding);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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vd->vdev_rebuilding = B_TRUE;
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vd->vdev_rebuilding = B_TRUE;
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@ -592,7 +592,7 @@ vdev_rebuild_range(vdev_rebuild_t *vr, uint64_t start, uint64_t size)
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mutex_exit(&vr->vr_io_lock);
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mutex_exit(&vr->vr_io_lock);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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uint64_t txg = dmu_tx_get_txg(tx);
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uint64_t txg = dmu_tx_get_txg(tx);
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spa_config_enter(spa, SCL_STATE_ALL, vd, RW_READER);
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spa_config_enter(spa, SCL_STATE_ALL, vd, RW_READER);
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@ -932,7 +932,7 @@ vdev_rebuild_thread(void *arg)
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dsl_pool_t *dp = spa_get_dsl(spa);
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dsl_pool_t *dp = spa_get_dsl(spa);
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dmu_tx_t *tx = dmu_tx_create_dd(dp->dp_mos_dir);
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dmu_tx_t *tx = dmu_tx_create_dd(dp->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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mutex_enter(&vd->vdev_rebuild_lock);
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mutex_enter(&vd->vdev_rebuild_lock);
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if (error == 0) {
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if (error == 0) {
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@ -1724,7 +1724,8 @@ again:
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dmu_tx_t *tx =
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dmu_tx_t *tx =
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dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT |
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DMU_TX_SUSPEND));
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uint64_t txg = dmu_tx_get_txg(tx);
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uint64_t txg = dmu_tx_get_txg(tx);
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/*
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/*
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@ -342,7 +342,7 @@ vdev_trim_change_state(vdev_t *vd, vdev_trim_state_t new_state,
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vd->vdev_trim_state = new_state;
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vd->vdev_trim_state = new_state;
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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dsl_sync_task_nowait(spa_get_dsl(spa), vdev_trim_zap_update_sync,
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dsl_sync_task_nowait(spa_get_dsl(spa), vdev_trim_zap_update_sync,
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guid, tx);
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guid, tx);
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@ -527,7 +527,7 @@ vdev_trim_range(trim_args_t *ta, uint64_t start, uint64_t size)
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mutex_exit(&vd->vdev_trim_io_lock);
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mutex_exit(&vd->vdev_trim_io_lock);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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dmu_tx_t *tx = dmu_tx_create_dd(spa_get_dsl(spa)->dp_mos_dir);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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uint64_t txg = dmu_tx_get_txg(tx);
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uint64_t txg = dmu_tx_get_txg(tx);
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spa_config_enter(spa, SCL_STATE_ALL, vd, RW_READER);
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spa_config_enter(spa, SCL_STATE_ALL, vd, RW_READER);
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@ -957,7 +957,7 @@ zil_commit_activate_saxattr_feature(zilog_t *zilog)
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dmu_objset_type(zilog->zl_os) != DMU_OST_ZVOL &&
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dmu_objset_type(zilog->zl_os) != DMU_OST_ZVOL &&
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!dsl_dataset_feature_is_active(ds, SPA_FEATURE_ZILSAXATTR)) {
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!dsl_dataset_feature_is_active(ds, SPA_FEATURE_ZILSAXATTR)) {
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tx = dmu_tx_create(zilog->zl_os);
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tx = dmu_tx_create(zilog->zl_os);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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dsl_dataset_dirty(ds, tx);
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dsl_dataset_dirty(ds, tx);
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txg = dmu_tx_get_txg(tx);
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txg = dmu_tx_get_txg(tx);
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@ -1003,7 +1003,7 @@ zil_create(zilog_t *zilog)
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*/
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*/
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if (BP_IS_HOLE(&blk) || BP_SHOULD_BYTESWAP(&blk)) {
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if (BP_IS_HOLE(&blk) || BP_SHOULD_BYTESWAP(&blk)) {
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tx = dmu_tx_create(zilog->zl_os);
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tx = dmu_tx_create(zilog->zl_os);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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dsl_dataset_dirty(dmu_objset_ds(zilog->zl_os), tx);
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dsl_dataset_dirty(dmu_objset_ds(zilog->zl_os), tx);
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txg = dmu_tx_get_txg(tx);
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txg = dmu_tx_get_txg(tx);
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@ -1093,7 +1093,7 @@ zil_destroy(zilog_t *zilog, boolean_t keep_first)
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return (B_FALSE);
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return (B_FALSE);
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tx = dmu_tx_create(zilog->zl_os);
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tx = dmu_tx_create(zilog->zl_os);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT));
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_SUSPEND));
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dsl_dataset_dirty(dmu_objset_ds(zilog->zl_os), tx);
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dsl_dataset_dirty(dmu_objset_ds(zilog->zl_os), tx);
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txg = dmu_tx_get_txg(tx);
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txg = dmu_tx_get_txg(tx);
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@ -1977,7 +1977,8 @@ next_lwb:
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* Open transaction to allocate the next block pointer.
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* Open transaction to allocate the next block pointer.
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*/
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*/
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dmu_tx_t *tx = dmu_tx_create(zilog->zl_os);
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dmu_tx_t *tx = dmu_tx_create(zilog->zl_os);
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_NOTHROTTLE));
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VERIFY0(dmu_tx_assign(tx,
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DMU_TX_WAIT | DMU_TX_NOTHROTTLE | DMU_TX_SUSPEND));
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dsl_dataset_dirty(dmu_objset_ds(zilog->zl_os), tx);
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dsl_dataset_dirty(dmu_objset_ds(zilog->zl_os), tx);
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uint64_t txg = dmu_tx_get_txg(tx);
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uint64_t txg = dmu_tx_get_txg(tx);
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@ -3456,7 +3457,8 @@ zil_commit_itx_assign(zilog_t *zilog, zil_commit_waiter_t *zcw)
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* should not be subject to the dirty data based delays. We
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* should not be subject to the dirty data based delays. We
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* use DMU_TX_NOTHROTTLE to bypass the delay mechanism.
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* use DMU_TX_NOTHROTTLE to bypass the delay mechanism.
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*/
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*/
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VERIFY0(dmu_tx_assign(tx, DMU_TX_WAIT | DMU_TX_NOTHROTTLE));
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VERIFY0(dmu_tx_assign(tx,
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DMU_TX_WAIT | DMU_TX_NOTHROTTLE | DMU_TX_SUSPEND));
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itx_t *itx = zil_itx_create(TX_COMMIT, sizeof (lr_t));
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itx_t *itx = zil_itx_create(TX_COMMIT, sizeof (lr_t));
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itx->itx_sync = B_TRUE;
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itx->itx_sync = B_TRUE;
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