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Convert all HAVE_<name> SIMD gates to HAVE_SIMD(<name>)

Browse Source 
The original names no longer exist, and the new ones will need to be
selectable based on the current compilation target.

Sponsored-by: TrueNAS
Reviewed-by: Brian Behlendorf <behlendorf1@llnl.gov>
Signed-off-by: Rob Norris <rob.norris@truenas.com>
Closes #18285
This commit is contained in:
Rob Norris
2026-03-04 22:28:21 +11:00
committed by Brian Behlendorf
parent 92a6ab405f
commit 35f74f84e6
33 changed files with 113 additions and 112 deletions
Download Patch File Download Diff File Expand all files Collapse all files
module/icp/algs/aes/aes_impl.c
+2 -2
View File
@@ -231,7 +231,7 @@ static const aes_impl_ops_t *aes_all_impl[] = {
#if defined(__x86_64)
&aes_x86_64_impl,
#endif
#if defined(__x86_64) && defined(HAVE_AES)
#if defined(__x86_64) && HAVE_SIMD(AES)
&aes_aesni_impl,
#endif
};
@@ -315,7 +315,7 @@ aes_impl_init(void)
* hardware accelerated version is the fastest.
*/
#if defined(__x86_64)
#if defined(HAVE_AES)
#if HAVE_SIMD(AES)
if (aes_aesni_impl.is_supported()) {
memcpy(&aes_fastest_impl, &aes_aesni_impl,
sizeof (aes_fastest_impl));
module/icp/algs/aes/aes_impl_aesni.c
+2 -2
View File
@@ -23,7 +23,7 @@
* Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
*/
#if defined(__x86_64) && defined(HAVE_AES)
#if defined(__x86_64) && HAVE_SIMD(AES)
#include <sys/simd.h>
#include <sys/types.h>
@@ -123,4 +123,4 @@ const aes_impl_ops_t aes_aesni_impl = {
.name = "aesni"
};
#endif /* defined(__x86_64) && defined(HAVE_AES) */
#endif /* defined(__x86_64) && HAVE_SIMD(AES) */
module/icp/algs/blake3/blake3_impl.c
+8 -8
View File
@@ -32,7 +32,7 @@
#include "blake3_impl.h"
#if defined(__aarch64__) || \
(defined(__x86_64) && defined(HAVE_SSE2)) || \
(defined(__x86_64) && HAVE_SIMD(SSE2)) || \
(defined(__PPC64__) && defined(__LITTLE_ENDIAN__))
extern void ASMABI zfs_blake3_compress_in_place_sse2(uint32_t cv[8],
@@ -98,7 +98,7 @@ const blake3_ops_t blake3_sse2_impl = {
#endif
#if defined(__aarch64__) || \
(defined(__x86_64) && defined(HAVE_SSE2)) || \
(defined(__x86_64) && HAVE_SIMD(SSE2)) || \
(defined(__PPC64__) && defined(__LITTLE_ENDIAN__))
extern void ASMABI zfs_blake3_compress_in_place_sse41(uint32_t cv[8],
@@ -163,7 +163,7 @@ const blake3_ops_t blake3_sse41_impl = {
};
#endif
#if defined(__x86_64) && defined(HAVE_SSE4_1) && defined(HAVE_AVX2)
#if defined(__x86_64) && HAVE_SIMD(SSE4_1) && HAVE_SIMD(AVX2)
extern void ASMABI zfs_blake3_hash_many_avx2(const uint8_t * const *inputs,
size_t num_inputs, size_t blocks, const uint32_t key[8],
uint64_t counter, boolean_t increment_counter, uint8_t flags,
@@ -196,7 +196,7 @@ blake3_avx2_impl = {
};
#endif
#if defined(__x86_64) && defined(HAVE_AVX512F) && defined(HAVE_AVX512VL)
#if defined(__x86_64) && HAVE_SIMD(AVX512F) && HAVE_SIMD(AVX512VL)
extern void ASMABI zfs_blake3_compress_in_place_avx512(uint32_t cv[8],
const uint8_t block[BLAKE3_BLOCK_LEN], uint8_t block_len,
uint64_t counter, uint8_t flags);
@@ -259,19 +259,19 @@ extern const blake3_ops_t blake3_generic_impl;
static const blake3_ops_t *const blake3_impls[] = {
&blake3_generic_impl,
#if defined(__aarch64__) || \
(defined(__x86_64) && defined(HAVE_SSE2)) || \
(defined(__x86_64) && HAVE_SIMD(SSE2)) || \
(defined(__PPC64__) && defined(__LITTLE_ENDIAN__))
&blake3_sse2_impl,
#endif
#if defined(__aarch64__) || \
(defined(__x86_64) && defined(HAVE_SSE4_1)) || \
(defined(__x86_64) && HAVE_SIMD(SSE4_1)) || \
(defined(__PPC64__) && defined(__LITTLE_ENDIAN__))
&blake3_sse41_impl,
#endif
#if defined(__x86_64) && defined(HAVE_SSE4_1) && defined(HAVE_AVX2)
#if defined(__x86_64) && HAVE_SIMD(SSE4_1) && HAVE_SIMD(AVX2)
&blake3_avx2_impl,
#endif
#if defined(__x86_64) && defined(HAVE_AVX512F) && defined(HAVE_AVX512VL)
#if defined(__x86_64) && HAVE_SIMD(AVX512F) && HAVE_SIMD(AVX512VL)
&blake3_avx512_impl,
#endif
};
module/icp/algs/modes/gcm.c
+3 -3
View File
@@ -714,7 +714,7 @@ static gcm_impl_ops_t gcm_fastest_impl = {
/* All compiled in implementations */
static const gcm_impl_ops_t *gcm_all_impl[] = {
&gcm_generic_impl,
#if defined(__x86_64) && defined(HAVE_PCLMULQDQ)
#if defined(__x86_64) && HAVE_SIMD(PCLMULQDQ)
&gcm_pclmulqdq_impl,
#endif
};
@@ -801,7 +801,7 @@ gcm_impl_init(void)
* Set the fastest implementation given the assumption that the
* hardware accelerated version is the fastest.
*/
#if defined(__x86_64) && defined(HAVE_PCLMULQDQ)
#if defined(__x86_64) && HAVE_SIMD(PCLMULQDQ)
if (gcm_pclmulqdq_impl.is_supported()) {
memcpy(&gcm_fastest_impl, &gcm_pclmulqdq_impl,
sizeof (gcm_fastest_impl));
@@ -827,7 +827,7 @@ gcm_impl_init(void)
} else
#endif
if (gcm_avx_will_work()) {
#ifdef HAVE_MOVBE
#if HAVE_SIMD(MOVBE)
if (zfs_movbe_available() == B_TRUE) {
atomic_swap_32(&gcm_avx_can_use_movbe, B_TRUE);
}
module/icp/algs/modes/gcm_pclmulqdq.c
+2 -2
View File
@@ -23,7 +23,7 @@
* Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
*/
#if defined(__x86_64) && defined(HAVE_PCLMULQDQ)
#if defined(__x86_64) && HAVE_SIMD(PCLMULQDQ)
#include <sys/types.h>
#include <sys/simd.h>
@@ -63,4 +63,4 @@ const gcm_impl_ops_t gcm_pclmulqdq_impl = {
.name = "pclmulqdq"
};
#endif /* defined(__x86_64) && defined(HAVE_PCLMULQDQ) */
#endif /* defined(__x86_64) && HAVE_SIMD(PCLMULQDQ) */
module/icp/algs/sha2/sha256_impl.c
+8 -8
View File
@@ -65,7 +65,7 @@ const sha256_ops_t sha256_x64_impl = {
.name = "x64"
};
#if defined(HAVE_SSSE3)
#if HAVE_SIMD(SSSE3)
static boolean_t sha2_have_ssse3(void)
{
return (kfpu_allowed() && zfs_ssse3_available());
@@ -79,7 +79,7 @@ const sha256_ops_t sha256_ssse3_impl = {
};
#endif
#if defined(HAVE_AVX)
#if HAVE_SIMD(AVX)
static boolean_t sha2_have_avx(void)
{
return (kfpu_allowed() && zfs_avx_available());
@@ -93,7 +93,7 @@ const sha256_ops_t sha256_avx_impl = {
};
#endif
#if defined(HAVE_AVX2)
#if HAVE_SIMD(AVX2)
static boolean_t sha2_have_avx2(void)
{
return (kfpu_allowed() && zfs_avx2_available());
@@ -107,7 +107,7 @@ const sha256_ops_t sha256_avx2_impl = {
};
#endif
#if defined(HAVE_SSE4_1)
#if HAVE_SIMD(SSE4_1)
static boolean_t sha2_have_shani(void)
{
return (kfpu_allowed() && zfs_sse4_1_available() && \
@@ -186,16 +186,16 @@ static const sha256_ops_t *const sha256_impls[] = {
#if defined(__x86_64)
&sha256_x64_impl,
#endif
#if defined(__x86_64) && defined(HAVE_SSSE3)
#if defined(__x86_64) && HAVE_SIMD(SSSE3)
&sha256_ssse3_impl,
#endif
#if defined(__x86_64) && defined(HAVE_AVX)
#if defined(__x86_64) && HAVE_SIMD(AVX)
&sha256_avx_impl,
#endif
#if defined(__x86_64) && defined(HAVE_AVX2)
#if defined(__x86_64) && HAVE_SIMD(AVX2)
&sha256_avx2_impl,
#endif
#if defined(__x86_64) && defined(HAVE_SSE4_1)
#if defined(__x86_64) && HAVE_SIMD(SSE4_1)
&sha256_shani_impl,
#endif
#if defined(__aarch64__) || defined(__arm__)
module/icp/algs/sha2/sha512_impl.c
+6 -6
View File
@@ -65,7 +65,7 @@ const sha512_ops_t sha512_x64_impl = {
.name = "x64"
};
#if defined(HAVE_AVX)
#if HAVE_SIMD(AVX)
static boolean_t sha2_have_avx(void)
{
return (kfpu_allowed() && zfs_avx_available());
@@ -79,7 +79,7 @@ const sha512_ops_t sha512_avx_impl = {
};
#endif
#if defined(HAVE_AVX2)
#if HAVE_SIMD(AVX2)
static boolean_t sha2_have_avx2(void)
{
return (kfpu_allowed() && zfs_avx2_available());
@@ -93,7 +93,7 @@ const sha512_ops_t sha512_avx2_impl = {
};
#endif
#if defined(HAVE_SHA512EXT)
#if HAVE_SIMD(SHA512EXT)
static boolean_t sha2_have_sha512ext(void)
{
return (kfpu_allowed() && zfs_sha512ext_available());
@@ -173,13 +173,13 @@ static const sha512_ops_t *const sha512_impls[] = {
#if defined(__x86_64)
&sha512_x64_impl,
#endif
#if defined(__x86_64) && defined(HAVE_AVX)
#if defined(__x86_64) && HAVE_SIMD(AVX)
&sha512_avx_impl,
#endif
#if defined(__x86_64) && defined(HAVE_AVX2)
#if defined(__x86_64) && HAVE_SIMD(AVX2)
&sha512_avx2_impl,
#endif
#if defined(__x86_64) && defined(HAVE_SHA512EXT)
#if defined(__x86_64) && HAVE_SIMD(SHA512EXT)
&sha512_sha512ext_impl,
#endif
#if defined(__aarch64__) || defined(__arm__)