Add AltiVec RAID-Z

Implements the RAID-Z function using AltiVec SIMD.
This is basically the NEON code translated to AltiVec.

Note that the 'fletcher' algorithm requires 64-bits
operations, and the initial implementations of AltiVec
(PPC74xx a.k.a. G4, PPC970 a.k.a. G5) only has up to
32-bits operations, so no 'fletcher'.

Reviewed-by: Brian Behlendorf <behlendorf1@llnl.gov>
Signed-off-by: Romain Dolbeau <romain.dolbeau@european-processor-initiative.eu>
Closes #9539
This commit is contained in:
Romain Dolbeau
2020-01-23 20:01:24 +01:00
committed by Brian Behlendorf
parent 1a69856034
commit 35b07497c6
12 changed files with 5200 additions and 1 deletions
+40
View File
@@ -437,6 +437,46 @@ zfs_avx512vbmi_available(void)
#define kfpu_begin() do {} while (0)
#define kfpu_end() do {} while (0)
#elif defined(__powerpc__)
#define kfpu_allowed() 1
#define kfpu_initialize(tsk) do {} while (0)
#define kfpu_begin() do {} while (0)
#define kfpu_end() do {} while (0)
/*
* Check if AltiVec instruction set is available
* No easy way beyond 'altivec works' :-(
*/
#include <signal.h>
#include <setjmp.h>
#ifdef __ALTIVEC__
static jmp_buf env;
static void sigillhandler(int x)
{
longjmp(env, 1);
}
#endif
static inline boolean_t
zfs_altivec_available(void)
{
boolean_t has_altivec = B_FALSE;
#ifdef __ALTIVEC__
sighandler_t savesig;
savesig = signal(SIGILL, sigillhandler);
if (setjmp(env)) {
signal(SIGILL, savesig);
has_altivec = B_FALSE;
} else {
__asm__ __volatile__("vor 0,0,0\n" : : : "v0");
signal(SIGILL, savesig);
has_altivec = B_TRUE;
}
#endif
return (has_altivec);
}
#else
#define kfpu_allowed() 0