diff --git a/config/toolchain-simd.m4 b/config/toolchain-simd.m4
index d552c99cd..d8197157f 100644
--- a/config/toolchain-simd.m4
+++ b/config/toolchain-simd.m4
@@ -27,6 +27,7 @@ AC_DEFUN([ZFS_AC_CONFIG_ALWAYS_TOOLCHAIN_SIMD], [
 			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_MOVBE
 			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_VAES
 			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_VPCLMULQDQ
+			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_SHA512EXT
 			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_XSAVE
 			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_XSAVEOPT
 			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_XSAVES
@@ -491,6 +492,27 @@ AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_VPCLMULQDQ], [
 	])
 ])
 
+dnl #
+dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_SHA512EXT
+dnl #
+AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_SHA512EXT], [
+	AC_MSG_CHECKING([whether host toolchain supports SHA512])
+
+	AC_LINK_IFELSE([AC_LANG_SOURCE([
+	[
+		int main()
+		{
+			__asm__ __volatile__("vsha512msg2 %ymm5, %ymm6");
+			return (0);
+		}
+	]])], [
+		AC_MSG_RESULT([yes])
+		AC_DEFINE([HAVE_SHA512EXT], 1, [Define if host toolchain supports SHA512])
+	], [
+		AC_MSG_RESULT([no])
+	])
+])
+
 dnl #
 dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_XSAVE
 dnl #
diff --git a/include/os/linux/kernel/linux/simd_x86.h b/include/os/linux/kernel/linux/simd_x86.h
index 326f471d7..be1d14df9 100644
--- a/include/os/linux/kernel/linux/simd_x86.h
+++ b/include/os/linux/kernel/linux/simd_x86.h
@@ -21,6 +21,7 @@
  */
 /*
  * Copyright (C) 2016 Gvozden Neskovic <neskovic@compeng.uni-frankfurt.de>.
+ * Copyright (c) 2026, TrueNAS.
  */
 
 /*
@@ -623,6 +624,19 @@ zfs_vpclmulqdq_available(void)
 #endif
 }
 
+/*
+ * Check if SHA512 instructions are available
+ */
+static inline boolean_t
+zfs_sha512ext_available(void)
+{
+#if defined(X86_FEATURE_SHA512)
+	return (!!boot_cpu_has(X86_FEATURE_SHA512));
+#else
+	return (B_FALSE);
+#endif
+}
+
 /*
  * Check if SHA_NI instruction set is available
  */
diff --git a/lib/libspl/include/sys/simd.h b/lib/libspl/include/sys/simd.h
index 59c1bfc0a..64f3b20c8 100644
--- a/lib/libspl/include/sys/simd.h
+++ b/lib/libspl/include/sys/simd.h
@@ -23,6 +23,7 @@
 /*
  * Copyright (c) 2006 Sun Microsystems, Inc.  All rights reserved.
  * Copyright (c) 2022 Tino Reichardt <milky-zfs@mcmilk.de>
+ * Copyright (c) 2026, TrueNAS.
  */
 
 #ifndef _LIBSPL_SYS_SIMD_H
@@ -104,7 +105,8 @@ typedef enum cpuid_inst_sets {
 	MOVBE,
 	SHA_NI,
 	VAES,
-	VPCLMULQDQ
+	VPCLMULQDQ,
+	SHA512EXT,
 } cpuid_inst_sets_t;
 
 /*
@@ -132,6 +134,7 @@ typedef struct cpuid_feature_desc {
 #define	_VAES_BIT		(1U << 9)
 #define	_VPCLMULQDQ_BIT		(1U << 10)
 #define	_SHA_NI_BIT		(1U << 29)
+#define	_SHA512_BIT		(1U << 0)
 
 /*
  * Descriptions of supported instruction sets
@@ -163,6 +166,7 @@ static const cpuid_feature_desc_t cpuid_features[] = {
 	[SHA_NI]	= {7U, 0U, _SHA_NI_BIT,		EBX	},
 	[VAES]		= {7U, 0U, _VAES_BIT,		ECX	},
 	[VPCLMULQDQ]	= {7U, 0U, _VPCLMULQDQ_BIT,	ECX	},
+	[SHA512EXT]	= {7U, 1U, _SHA512_BIT,		EAX	},
 };
 
 /*
@@ -239,6 +243,7 @@ CPUID_FEATURE_CHECK(movbe, MOVBE);
 CPUID_FEATURE_CHECK(shani, SHA_NI);
 CPUID_FEATURE_CHECK(vaes, VAES);
 CPUID_FEATURE_CHECK(vpclmulqdq, VPCLMULQDQ);
+CPUID_FEATURE_CHECK(sha512ext, SHA512EXT);
 
 /*
  * Detect register set support
@@ -407,6 +412,15 @@ zfs_vpclmulqdq_available(void)
 	return (__cpuid_has_vpclmulqdq());
 }
 
+/*
+ * Check if SHA512 instructions are available
+ */
+static inline boolean_t
+zfs_sha512ext_available(void)
+{
+	return (__cpuid_has_sha512ext());
+}
+
 /*
  * AVX-512 family of instruction sets:
  *
diff --git a/module/zcommon/simd_stat.c b/module/zcommon/simd_stat.c
index 007ae9e4f..83685563b 100644
--- a/module/zcommon/simd_stat.c
+++ b/module/zcommon/simd_stat.c
@@ -122,6 +122,8 @@ simd_stat_kstat_data(char *buf, size_t size, void *data)
 		    "vaes", zfs_vaes_available());
 		off += SIMD_STAT_PRINT(simd_stat_kstat_payload,
 		    "vpclmulqdq", zfs_vpclmulqdq_available());
+		off += SIMD_STAT_PRINT(simd_stat_kstat_payload,
+		    "sha512ext", zfs_sha512ext_available());
 
 		off += SIMD_STAT_PRINT(simd_stat_kstat_payload,
 		    "osxsave", boot_cpu_has(X86_FEATURE_OSXSAVE));