SIMD implementation of vdev_raidz generate and reconstruct routines
This is a new implementation of RAIDZ1/2/3 routines using x86_64
scalar, SSE, and AVX2 instruction sets. Included are 3 parity
generation routines (P, PQ, and PQR) and 7 reconstruction routines,
for all RAIDZ level. On module load, a quick benchmark of supported
routines will select the fastest for each operation and they will
be used at runtime. Original implementation is still present and
can be selected via module parameter.
Patch contains:
- specialized gen/rec routines for all RAIDZ levels,
- new scalar raidz implementation (unrolled),
- two x86_64 SIMD implementations (SSE and AVX2 instructions sets),
- fastest routines selected on module load (benchmark).
- cmd/raidz_test - verify and benchmark all implementations
- added raidz_test to the ZFS Test Suite
New zfs module parameters:
- zfs_vdev_raidz_impl (str): selects the implementation to use. On
module load, the parameter will only accept first 3 options, and
the other implementations can be set once module is finished
loading. Possible values for this option are:
"fastest" - use the fastest math available
"original" - use the original raidz code
"scalar" - new scalar impl
"sse" - new SSE impl if available
"avx2" - new AVX2 impl if available
See contents of `/sys/module/zfs/parameters/zfs_vdev_raidz_impl` to
get the list of supported values. If an implementation is not supported
on the system, it will not be shown. Currently selected option is
enclosed in `[]`.
Signed-off-by: Gvozden Neskovic <neskovic@gmail.com>
Signed-off-by: Brian Behlendorf <behlendorf1@llnl.gov>
Closes #4328
2016-04-25 11:04:31 +03:00
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/*
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* CDDL HEADER START
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*
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* The contents of this file are subject to the terms of the
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* Common Development and Distribution License (the "License").
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* You may not use this file except in compliance with the License.
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*
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* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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* or http://www.opensolaris.org/os/licensing.
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* See the License for the specific language governing permissions
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* and limitations under the License.
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*
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* When distributing Covered Code, include this CDDL HEADER in each
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* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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* If applicable, add the following below this CDDL HEADER, with the
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* fields enclosed by brackets "[]" replaced with your own identifying
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* information: Portions Copyright [yyyy] [name of copyright owner]
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*
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* CDDL HEADER END
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*/
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/*
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* Copyright (C) 2016 Gvozden Nešković. All rights reserved.
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*/
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#include <sys/vdev_raidz_impl.h>
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/*
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* Provide native CPU scalar routines.
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* Support 32bit and 64bit CPUs.
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*/
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#if ((~(0x0ULL)) >> 24) == 0xffULL
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#define ELEM_SIZE 4
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typedef uint32_t iv_t;
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#elif ((~(0x0ULL)) >> 56) == 0xffULL
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#define ELEM_SIZE 8
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typedef uint64_t iv_t;
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#endif
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/*
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* Vector type used in scalar implementation
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*
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* The union is expected to be of native CPU register size. Since addition
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* uses XOR operation, it can be performed an all byte elements at once.
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* Multiplication requires per byte access.
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*/
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typedef union {
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iv_t e;
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uint8_t b[ELEM_SIZE];
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} v_t;
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/*
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* Precomputed lookup tables for multiplication by a constant
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*
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* Reconstruction path requires multiplication by a constant factors. Instead of
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* performing two step lookup (log & exp tables), a direct lookup can be used
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* instead. Multiplication of element 'a' by a constant 'c' is obtained as:
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*
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* r = vdev_raidz_mul_lt[c_log][a];
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*
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* where c_log = vdev_raidz_log2[c]. Log of coefficient factors is used because
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* they are faster to obtain while solving the syndrome equations.
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*
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* PERFORMANCE NOTE:
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* Even though the complete lookup table uses 64kiB, only relatively small
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* portion of it is used at the same time. Following shows number of accessed
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* bytes for different cases:
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* - 1 failed disk: 256B (1 mul. coefficient)
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* - 2 failed disks: 512B (2 mul. coefficients)
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* - 3 failed disks: 1536B (6 mul. coefficients)
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*
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* Size of actually accessed lookup table regions is only larger for
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* reconstruction of 3 failed disks, when compared to traditional log/exp
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* method. But since the result is obtained in one lookup step performance is
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* doubled.
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*/
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static uint8_t vdev_raidz_mul_lt[256][256] __attribute__((aligned(256)));
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static void
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raidz_init_scalar(void)
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{
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int c, i;
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for (c = 0; c < 256; c++)
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for (i = 0; i < 256; i++)
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vdev_raidz_mul_lt[c][i] = gf_mul(c, i);
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}
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#define PREFETCHNTA(ptr, offset) {}
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#define PREFETCH(ptr, offset) {}
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#define XOR_ACC(src, acc) acc.e ^= ((v_t *)src)[0].e
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#define XOR(src, acc) acc.e ^= src.e
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Add parity generation/rebuild using 128-bits NEON for Aarch64
This re-use the framework established for SSE2, SSSE3 and
AVX2. However, GCC is using FP registers on Aarch64, so
unlike SSE/AVX2 we can't rely on the registers being left alone
between ASM statements. So instead, the NEON code uses
C variables and GCC extended ASM syntax. Note that since
the kernel explicitly disable vector registers, they
have to be locally re-enabled explicitly.
As we use the variable's number to define the symbolic
name, and GCC won't allow duplicate symbolic names,
numbers have to be unique. Even when the code is not
going to be used (e.g. the case for 4 registers when
using the macro with only 2). Only the actually used
variables should be declared, otherwise the build
will fails in debug mode.
This requires the replacement of the XOR(X,X) syntax
by a new ZERO(X) macro, which does the same thing but
without repeating the argument. And perhaps someday
there will be a machine where there is a more efficient
way to zero a register than XOR with itself. This affects
scalar, SSE2, SSSE3 and AVX2 as they need the new macro.
It's possible to write faster implementations (different
scheduling, different unrolling, interleaving NEON and
scalar, ...) for various cores, but this one has the
advantage of fitting in the current state of the code,
and thus is likely easier to review/check/merge.
The only difference between aarch64-neon and aarch64-neonx2
is that aarch64-neonx2 unroll some functions some more.
Reviewed-by: Gvozden Neskovic <neskovic@gmail.com>
Reviewed-by: Brian Behlendorf <behlendorf1@llnl.gov>
Signed-off-by: Romain Dolbeau <romain.dolbeau@atos.net>
Closes #4801
2016-10-03 19:44:00 +03:00
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#define ZERO(acc) acc.e = 0
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SIMD implementation of vdev_raidz generate and reconstruct routines
This is a new implementation of RAIDZ1/2/3 routines using x86_64
scalar, SSE, and AVX2 instruction sets. Included are 3 parity
generation routines (P, PQ, and PQR) and 7 reconstruction routines,
for all RAIDZ level. On module load, a quick benchmark of supported
routines will select the fastest for each operation and they will
be used at runtime. Original implementation is still present and
can be selected via module parameter.
Patch contains:
- specialized gen/rec routines for all RAIDZ levels,
- new scalar raidz implementation (unrolled),
- two x86_64 SIMD implementations (SSE and AVX2 instructions sets),
- fastest routines selected on module load (benchmark).
- cmd/raidz_test - verify and benchmark all implementations
- added raidz_test to the ZFS Test Suite
New zfs module parameters:
- zfs_vdev_raidz_impl (str): selects the implementation to use. On
module load, the parameter will only accept first 3 options, and
the other implementations can be set once module is finished
loading. Possible values for this option are:
"fastest" - use the fastest math available
"original" - use the original raidz code
"scalar" - new scalar impl
"sse" - new SSE impl if available
"avx2" - new AVX2 impl if available
See contents of `/sys/module/zfs/parameters/zfs_vdev_raidz_impl` to
get the list of supported values. If an implementation is not supported
on the system, it will not be shown. Currently selected option is
enclosed in `[]`.
Signed-off-by: Gvozden Neskovic <neskovic@gmail.com>
Signed-off-by: Brian Behlendorf <behlendorf1@llnl.gov>
Closes #4328
2016-04-25 11:04:31 +03:00
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#define COPY(src, dst) dst = src
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#define LOAD(src, val) val = ((v_t *)src)[0]
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#define STORE(dst, val) ((v_t *)dst)[0] = val
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/*
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* Constants used for optimized multiplication by 2.
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*/
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static const struct {
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iv_t mod;
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iv_t mask;
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iv_t msb;
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} scalar_mul2_consts = {
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#if ELEM_SIZE == 8
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.mod = 0x1d1d1d1d1d1d1d1dULL,
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.mask = 0xfefefefefefefefeULL,
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.msb = 0x8080808080808080ULL,
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#else
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.mod = 0x1d1d1d1dULL,
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.mask = 0xfefefefeULL,
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.msb = 0x80808080ULL,
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#endif
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};
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#define MUL2_SETUP() {}
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#define MUL2(a) \
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{ \
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iv_t _mask; \
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\
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_mask = (a).e & scalar_mul2_consts.msb; \
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_mask = (_mask << 1) - (_mask >> 7); \
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(a).e = ((a).e << 1) & scalar_mul2_consts.mask; \
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(a).e = (a).e ^ (_mask & scalar_mul2_consts.mod); \
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}
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#define MUL4(a) \
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{ \
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MUL2(a); \
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MUL2(a); \
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}
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#define MUL(c, a) \
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{ \
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const uint8_t *mul_lt = vdev_raidz_mul_lt[c]; \
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switch (ELEM_SIZE) { \
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case 8: \
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a.b[7] = mul_lt[a.b[7]]; \
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a.b[6] = mul_lt[a.b[6]]; \
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a.b[5] = mul_lt[a.b[5]]; \
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a.b[4] = mul_lt[a.b[4]]; \
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case 4: \
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a.b[3] = mul_lt[a.b[3]]; \
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a.b[2] = mul_lt[a.b[2]]; \
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a.b[1] = mul_lt[a.b[1]]; \
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a.b[0] = mul_lt[a.b[0]]; \
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break; \
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} \
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}
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#define raidz_math_begin() {}
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#define raidz_math_end() {}
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#define GEN_P_DEFINE() v_t p0
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#define GEN_P_STRIDE 1
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#define GEN_P_P p0
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#define GEN_PQ_DEFINE() v_t d0, p0, q0
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#define GEN_PQ_STRIDE 1
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#define GEN_PQ_D d0
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#define GEN_PQ_P p0
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#define GEN_PQ_Q q0
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#define GEN_PQR_DEFINE() v_t d0, p0, q0, r0
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#define GEN_PQR_STRIDE 1
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#define GEN_PQR_D d0
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#define GEN_PQR_P p0
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#define GEN_PQR_Q q0
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#define GEN_PQR_R r0
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#define REC_P_DEFINE() v_t x0
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#define REC_P_STRIDE 1
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#define REC_P_X x0
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#define REC_Q_DEFINE() v_t x0
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#define REC_Q_STRIDE 1
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#define REC_Q_X x0
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#define REC_R_DEFINE() v_t x0
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#define REC_R_STRIDE 1
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#define REC_R_X x0
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#define REC_PQ_DEFINE() v_t x0, y0, d0
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#define REC_PQ_STRIDE 1
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#define REC_PQ_X x0
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#define REC_PQ_Y y0
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#define REC_PQ_D d0
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#define REC_PR_DEFINE() v_t x0, y0, d0
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#define REC_PR_STRIDE 1
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#define REC_PR_X x0
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#define REC_PR_Y y0
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#define REC_PR_D d0
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#define REC_QR_DEFINE() v_t x0, y0, d0
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#define REC_QR_STRIDE 1
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#define REC_QR_X x0
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#define REC_QR_Y y0
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#define REC_QR_D d0
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#define REC_PQR_DEFINE() v_t x0, y0, z0, d0, t0
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#define REC_PQR_STRIDE 1
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#define REC_PQR_X x0
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#define REC_PQR_Y y0
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#define REC_PQR_Z z0
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#define REC_PQR_D d0
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#define REC_PQR_XS d0
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#define REC_PQR_YS t0
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#include "vdev_raidz_math_impl.h"
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2016-06-29 23:31:25 +03:00
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/*
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* If compiled with -O0, gcc doesn't do any stack frame coalescing
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* and -Wframe-larger-than=1024 is triggered in debug mode.
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* Starting with gcc 4.8, new opt level -Og is introduced for debugging, which
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* does not trigger this warning.
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*/
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#pragma GCC diagnostic ignored "-Wframe-larger-than="
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SIMD implementation of vdev_raidz generate and reconstruct routines
This is a new implementation of RAIDZ1/2/3 routines using x86_64
scalar, SSE, and AVX2 instruction sets. Included are 3 parity
generation routines (P, PQ, and PQR) and 7 reconstruction routines,
for all RAIDZ level. On module load, a quick benchmark of supported
routines will select the fastest for each operation and they will
be used at runtime. Original implementation is still present and
can be selected via module parameter.
Patch contains:
- specialized gen/rec routines for all RAIDZ levels,
- new scalar raidz implementation (unrolled),
- two x86_64 SIMD implementations (SSE and AVX2 instructions sets),
- fastest routines selected on module load (benchmark).
- cmd/raidz_test - verify and benchmark all implementations
- added raidz_test to the ZFS Test Suite
New zfs module parameters:
- zfs_vdev_raidz_impl (str): selects the implementation to use. On
module load, the parameter will only accept first 3 options, and
the other implementations can be set once module is finished
loading. Possible values for this option are:
"fastest" - use the fastest math available
"original" - use the original raidz code
"scalar" - new scalar impl
"sse" - new SSE impl if available
"avx2" - new AVX2 impl if available
See contents of `/sys/module/zfs/parameters/zfs_vdev_raidz_impl` to
get the list of supported values. If an implementation is not supported
on the system, it will not be shown. Currently selected option is
enclosed in `[]`.
Signed-off-by: Gvozden Neskovic <neskovic@gmail.com>
Signed-off-by: Brian Behlendorf <behlendorf1@llnl.gov>
Closes #4328
2016-04-25 11:04:31 +03:00
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DEFINE_GEN_METHODS(scalar);
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DEFINE_REC_METHODS(scalar);
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2016-07-17 20:41:11 +03:00
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boolean_t
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SIMD implementation of vdev_raidz generate and reconstruct routines
This is a new implementation of RAIDZ1/2/3 routines using x86_64
scalar, SSE, and AVX2 instruction sets. Included are 3 parity
generation routines (P, PQ, and PQR) and 7 reconstruction routines,
for all RAIDZ level. On module load, a quick benchmark of supported
routines will select the fastest for each operation and they will
be used at runtime. Original implementation is still present and
can be selected via module parameter.
Patch contains:
- specialized gen/rec routines for all RAIDZ levels,
- new scalar raidz implementation (unrolled),
- two x86_64 SIMD implementations (SSE and AVX2 instructions sets),
- fastest routines selected on module load (benchmark).
- cmd/raidz_test - verify and benchmark all implementations
- added raidz_test to the ZFS Test Suite
New zfs module parameters:
- zfs_vdev_raidz_impl (str): selects the implementation to use. On
module load, the parameter will only accept first 3 options, and
the other implementations can be set once module is finished
loading. Possible values for this option are:
"fastest" - use the fastest math available
"original" - use the original raidz code
"scalar" - new scalar impl
"sse" - new SSE impl if available
"avx2" - new AVX2 impl if available
See contents of `/sys/module/zfs/parameters/zfs_vdev_raidz_impl` to
get the list of supported values. If an implementation is not supported
on the system, it will not be shown. Currently selected option is
enclosed in `[]`.
Signed-off-by: Gvozden Neskovic <neskovic@gmail.com>
Signed-off-by: Brian Behlendorf <behlendorf1@llnl.gov>
Closes #4328
2016-04-25 11:04:31 +03:00
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raidz_will_scalar_work(void)
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{
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return (B_TRUE); /* always */
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}
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const raidz_impl_ops_t vdev_raidz_scalar_impl = {
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.init = raidz_init_scalar,
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.fini = NULL,
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.gen = RAIDZ_GEN_METHODS(scalar),
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.rec = RAIDZ_REC_METHODS(scalar),
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.is_supported = &raidz_will_scalar_work,
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.name = "scalar"
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};
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/* Powers of 2 in the RAID-Z Galois field. */
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const uint8_t vdev_raidz_pow2[256] __attribute__((aligned(256))) = {
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0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
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0x1d, 0x3a, 0x74, 0xe8, 0xcd, 0x87, 0x13, 0x26,
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0x4c, 0x98, 0x2d, 0x5a, 0xb4, 0x75, 0xea, 0xc9,
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0x8f, 0x03, 0x06, 0x0c, 0x18, 0x30, 0x60, 0xc0,
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|
|
0x9d, 0x27, 0x4e, 0x9c, 0x25, 0x4a, 0x94, 0x35,
|
|
|
|
0x6a, 0xd4, 0xb5, 0x77, 0xee, 0xc1, 0x9f, 0x23,
|
|
|
|
0x46, 0x8c, 0x05, 0x0a, 0x14, 0x28, 0x50, 0xa0,
|
|
|
|
0x5d, 0xba, 0x69, 0xd2, 0xb9, 0x6f, 0xde, 0xa1,
|
|
|
|
0x5f, 0xbe, 0x61, 0xc2, 0x99, 0x2f, 0x5e, 0xbc,
|
|
|
|
0x65, 0xca, 0x89, 0x0f, 0x1e, 0x3c, 0x78, 0xf0,
|
|
|
|
0xfd, 0xe7, 0xd3, 0xbb, 0x6b, 0xd6, 0xb1, 0x7f,
|
|
|
|
0xfe, 0xe1, 0xdf, 0xa3, 0x5b, 0xb6, 0x71, 0xe2,
|
|
|
|
0xd9, 0xaf, 0x43, 0x86, 0x11, 0x22, 0x44, 0x88,
|
|
|
|
0x0d, 0x1a, 0x34, 0x68, 0xd0, 0xbd, 0x67, 0xce,
|
|
|
|
0x81, 0x1f, 0x3e, 0x7c, 0xf8, 0xed, 0xc7, 0x93,
|
|
|
|
0x3b, 0x76, 0xec, 0xc5, 0x97, 0x33, 0x66, 0xcc,
|
|
|
|
0x85, 0x17, 0x2e, 0x5c, 0xb8, 0x6d, 0xda, 0xa9,
|
|
|
|
0x4f, 0x9e, 0x21, 0x42, 0x84, 0x15, 0x2a, 0x54,
|
|
|
|
0xa8, 0x4d, 0x9a, 0x29, 0x52, 0xa4, 0x55, 0xaa,
|
|
|
|
0x49, 0x92, 0x39, 0x72, 0xe4, 0xd5, 0xb7, 0x73,
|
|
|
|
0xe6, 0xd1, 0xbf, 0x63, 0xc6, 0x91, 0x3f, 0x7e,
|
|
|
|
0xfc, 0xe5, 0xd7, 0xb3, 0x7b, 0xf6, 0xf1, 0xff,
|
|
|
|
0xe3, 0xdb, 0xab, 0x4b, 0x96, 0x31, 0x62, 0xc4,
|
|
|
|
0x95, 0x37, 0x6e, 0xdc, 0xa5, 0x57, 0xae, 0x41,
|
|
|
|
0x82, 0x19, 0x32, 0x64, 0xc8, 0x8d, 0x07, 0x0e,
|
|
|
|
0x1c, 0x38, 0x70, 0xe0, 0xdd, 0xa7, 0x53, 0xa6,
|
|
|
|
0x51, 0xa2, 0x59, 0xb2, 0x79, 0xf2, 0xf9, 0xef,
|
|
|
|
0xc3, 0x9b, 0x2b, 0x56, 0xac, 0x45, 0x8a, 0x09,
|
|
|
|
0x12, 0x24, 0x48, 0x90, 0x3d, 0x7a, 0xf4, 0xf5,
|
|
|
|
0xf7, 0xf3, 0xfb, 0xeb, 0xcb, 0x8b, 0x0b, 0x16,
|
|
|
|
0x2c, 0x58, 0xb0, 0x7d, 0xfa, 0xe9, 0xcf, 0x83,
|
|
|
|
0x1b, 0x36, 0x6c, 0xd8, 0xad, 0x47, 0x8e, 0x01
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Logs of 2 in the RAID-Z Galois field. */
|
|
|
|
const uint8_t vdev_raidz_log2[256] __attribute__((aligned(256))) = {
|
|
|
|
0x00, 0x00, 0x01, 0x19, 0x02, 0x32, 0x1a, 0xc6,
|
|
|
|
0x03, 0xdf, 0x33, 0xee, 0x1b, 0x68, 0xc7, 0x4b,
|
|
|
|
0x04, 0x64, 0xe0, 0x0e, 0x34, 0x8d, 0xef, 0x81,
|
|
|
|
0x1c, 0xc1, 0x69, 0xf8, 0xc8, 0x08, 0x4c, 0x71,
|
|
|
|
0x05, 0x8a, 0x65, 0x2f, 0xe1, 0x24, 0x0f, 0x21,
|
|
|
|
0x35, 0x93, 0x8e, 0xda, 0xf0, 0x12, 0x82, 0x45,
|
|
|
|
0x1d, 0xb5, 0xc2, 0x7d, 0x6a, 0x27, 0xf9, 0xb9,
|
|
|
|
0xc9, 0x9a, 0x09, 0x78, 0x4d, 0xe4, 0x72, 0xa6,
|
|
|
|
0x06, 0xbf, 0x8b, 0x62, 0x66, 0xdd, 0x30, 0xfd,
|
|
|
|
0xe2, 0x98, 0x25, 0xb3, 0x10, 0x91, 0x22, 0x88,
|
|
|
|
0x36, 0xd0, 0x94, 0xce, 0x8f, 0x96, 0xdb, 0xbd,
|
|
|
|
0xf1, 0xd2, 0x13, 0x5c, 0x83, 0x38, 0x46, 0x40,
|
|
|
|
0x1e, 0x42, 0xb6, 0xa3, 0xc3, 0x48, 0x7e, 0x6e,
|
|
|
|
0x6b, 0x3a, 0x28, 0x54, 0xfa, 0x85, 0xba, 0x3d,
|
|
|
|
0xca, 0x5e, 0x9b, 0x9f, 0x0a, 0x15, 0x79, 0x2b,
|
|
|
|
0x4e, 0xd4, 0xe5, 0xac, 0x73, 0xf3, 0xa7, 0x57,
|
|
|
|
0x07, 0x70, 0xc0, 0xf7, 0x8c, 0x80, 0x63, 0x0d,
|
|
|
|
0x67, 0x4a, 0xde, 0xed, 0x31, 0xc5, 0xfe, 0x18,
|
|
|
|
0xe3, 0xa5, 0x99, 0x77, 0x26, 0xb8, 0xb4, 0x7c,
|
|
|
|
0x11, 0x44, 0x92, 0xd9, 0x23, 0x20, 0x89, 0x2e,
|
|
|
|
0x37, 0x3f, 0xd1, 0x5b, 0x95, 0xbc, 0xcf, 0xcd,
|
|
|
|
0x90, 0x87, 0x97, 0xb2, 0xdc, 0xfc, 0xbe, 0x61,
|
|
|
|
0xf2, 0x56, 0xd3, 0xab, 0x14, 0x2a, 0x5d, 0x9e,
|
|
|
|
0x84, 0x3c, 0x39, 0x53, 0x47, 0x6d, 0x41, 0xa2,
|
|
|
|
0x1f, 0x2d, 0x43, 0xd8, 0xb7, 0x7b, 0xa4, 0x76,
|
|
|
|
0xc4, 0x17, 0x49, 0xec, 0x7f, 0x0c, 0x6f, 0xf6,
|
|
|
|
0x6c, 0xa1, 0x3b, 0x52, 0x29, 0x9d, 0x55, 0xaa,
|
|
|
|
0xfb, 0x60, 0x86, 0xb1, 0xbb, 0xcc, 0x3e, 0x5a,
|
|
|
|
0xcb, 0x59, 0x5f, 0xb0, 0x9c, 0xa9, 0xa0, 0x51,
|
|
|
|
0x0b, 0xf5, 0x16, 0xeb, 0x7a, 0x75, 0x2c, 0xd7,
|
|
|
|
0x4f, 0xae, 0xd5, 0xe9, 0xe6, 0xe7, 0xad, 0xe8,
|
|
|
|
0x74, 0xd6, 0xf4, 0xea, 0xa8, 0x50, 0x58, 0xaf,
|
|
|
|
};
|