164 lines
5.4 KiB
C
164 lines
5.4 KiB
C
/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
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/*
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* RSEQ_SIG uses the trap4 instruction. As Linux does not make use of the
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* access-register mode nor the linkage stack this instruction will always
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* cause a special-operation exception (the trap-enabled bit in the DUCT
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* is and will stay 0). The instruction pattern is
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* b2 ff 0f ff trap4 4095(%r0)
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*/
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#define RSEQ_SIG 0xB2FF0FFF
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#define rseq_smp_mb() __asm__ __volatile__ ("bcr 15,0" ::: "memory")
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#define rseq_smp_rmb() rseq_smp_mb()
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#define rseq_smp_wmb() rseq_smp_mb()
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#define rseq_smp_load_acquire(p) \
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__extension__ ({ \
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rseq_unqual_scalar_typeof(*(p)) ____p1 = RSEQ_READ_ONCE(*(p)); \
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rseq_barrier(); \
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____p1; \
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})
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#define rseq_smp_acquire__after_ctrl_dep() rseq_smp_rmb()
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#define rseq_smp_store_release(p, v) \
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do { \
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rseq_barrier(); \
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RSEQ_WRITE_ONCE(*(p), v); \
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} while (0)
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#ifdef __s390x__
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#define LONG_L "lg"
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#define LONG_S "stg"
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#define LONG_LT_R "ltgr"
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#define LONG_CMP "cg"
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#define LONG_CMP_R "cgr"
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#define LONG_ADDI "aghi"
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#define LONG_ADD_R "agr"
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#define __RSEQ_ASM_DEFINE_TABLE(label, version, flags, \
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start_ip, post_commit_offset, abort_ip) \
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".pushsection __rseq_cs, \"aw\"\n\t" \
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".balign 32\n\t" \
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__rseq_str(label) ":\n\t" \
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".long " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
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".quad " __rseq_str(start_ip) ", " __rseq_str(post_commit_offset) ", " __rseq_str(abort_ip) "\n\t" \
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".popsection\n\t" \
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".pushsection __rseq_cs_ptr_array, \"aw\"\n\t" \
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".quad " __rseq_str(label) "b\n\t" \
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".popsection\n\t"
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/*
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* Exit points of a rseq critical section consist of all instructions outside
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* of the critical section where a critical section can either branch to or
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* reach through the normal course of its execution. The abort IP and the
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* post-commit IP are already part of the __rseq_cs section and should not be
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* explicitly defined as additional exit points. Knowing all exit points is
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* useful to assist debuggers stepping over the critical section.
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*/
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#define RSEQ_ASM_DEFINE_EXIT_POINT(start_ip, exit_ip) \
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".pushsection __rseq_exit_point_array, \"aw\"\n\t" \
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".quad " __rseq_str(start_ip) ", " __rseq_str(exit_ip) "\n\t" \
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".popsection\n\t"
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#elif __s390__
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#define __RSEQ_ASM_DEFINE_TABLE(label, version, flags, \
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start_ip, post_commit_offset, abort_ip) \
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".pushsection __rseq_cs, \"aw\"\n\t" \
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".balign 32\n\t" \
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__rseq_str(label) ":\n\t" \
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".long " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
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".long 0x0, " __rseq_str(start_ip) ", 0x0, " __rseq_str(post_commit_offset) ", 0x0, " __rseq_str(abort_ip) "\n\t" \
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".popsection\n\t" \
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".pushsection __rseq_cs_ptr_array, \"aw\"\n\t" \
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".long 0x0, " __rseq_str(label) "b\n\t" \
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".popsection\n\t"
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/*
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* Exit points of a rseq critical section consist of all instructions outside
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* of the critical section where a critical section can either branch to or
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* reach through the normal course of its execution. The abort IP and the
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* post-commit IP are already part of the __rseq_cs section and should not be
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* explicitly defined as additional exit points. Knowing all exit points is
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* useful to assist debuggers stepping over the critical section.
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*/
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#define RSEQ_ASM_DEFINE_EXIT_POINT(start_ip, exit_ip) \
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".pushsection __rseq_exit_point_array, \"aw\"\n\t" \
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".long 0x0, " __rseq_str(start_ip) ", 0x0, " __rseq_str(exit_ip) "\n\t" \
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".popsection\n\t"
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#define LONG_L "l"
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#define LONG_S "st"
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#define LONG_LT_R "ltr"
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#define LONG_CMP "c"
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#define LONG_CMP_R "cr"
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#define LONG_ADDI "ahi"
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#define LONG_ADD_R "ar"
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#endif
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#define RSEQ_ASM_DEFINE_TABLE(label, start_ip, post_commit_ip, abort_ip) \
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__RSEQ_ASM_DEFINE_TABLE(label, 0x0, 0x0, start_ip, \
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(post_commit_ip - start_ip), abort_ip)
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#define RSEQ_ASM_STORE_RSEQ_CS(label, cs_label, rseq_cs) \
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RSEQ_INJECT_ASM(1) \
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"larl %%r0, " __rseq_str(cs_label) "\n\t" \
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LONG_S " %%r0, %[" __rseq_str(rseq_cs) "]\n\t" \
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__rseq_str(label) ":\n\t"
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#define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label) \
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RSEQ_INJECT_ASM(2) \
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"c %[" __rseq_str(cpu_id) "], %[" __rseq_str(current_cpu_id) "]\n\t" \
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"jnz " __rseq_str(label) "\n\t"
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#define RSEQ_ASM_DEFINE_ABORT(label, teardown, abort_label) \
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".pushsection __rseq_failure, \"ax\"\n\t" \
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".long " __rseq_str(RSEQ_SIG) "\n\t" \
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__rseq_str(label) ":\n\t" \
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teardown \
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"jg %l[" __rseq_str(abort_label) "]\n\t" \
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".popsection\n\t"
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#define RSEQ_ASM_DEFINE_CMPFAIL(label, teardown, cmpfail_label) \
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".pushsection __rseq_failure, \"ax\"\n\t" \
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__rseq_str(label) ":\n\t" \
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teardown \
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"jg %l[" __rseq_str(cmpfail_label) "]\n\t" \
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".popsection\n\t"
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/* Per-cpu-id indexing. */
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#define RSEQ_TEMPLATE_CPU_ID
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#define RSEQ_TEMPLATE_MO_RELAXED
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#include "rseq-s390-bits.h"
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#undef RSEQ_TEMPLATE_MO_RELAXED
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#define RSEQ_TEMPLATE_MO_RELEASE
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#include "rseq-s390-bits.h"
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#undef RSEQ_TEMPLATE_MO_RELEASE
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#undef RSEQ_TEMPLATE_CPU_ID
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/* Per-mm-cid indexing. */
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#define RSEQ_TEMPLATE_MM_CID
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#define RSEQ_TEMPLATE_MO_RELAXED
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#include "rseq-s390-bits.h"
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#undef RSEQ_TEMPLATE_MO_RELAXED
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#define RSEQ_TEMPLATE_MO_RELEASE
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#include "rseq-s390-bits.h"
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#undef RSEQ_TEMPLATE_MO_RELEASE
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#undef RSEQ_TEMPLATE_MM_CID
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/* APIs which are not based on cpu ids. */
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#define RSEQ_TEMPLATE_CPU_ID_NONE
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#define RSEQ_TEMPLATE_MO_RELAXED
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#include "rseq-s390-bits.h"
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#undef RSEQ_TEMPLATE_MO_RELAXED
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#undef RSEQ_TEMPLATE_CPU_ID_NONE
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