321 lines
8.2 KiB
C
321 lines
8.2 KiB
C
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2023 Advanced Micro Devices, Inc.
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//
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// Authors: Syed Saba kareem <syed.sabakareem@amd.com>
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/*
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* Hardware interface for ACP6.3 block
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*/
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include <linux/dma-mapping.h>
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#include <linux/pm_runtime.h>
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#include <linux/pci.h>
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#include "amd.h"
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#include "acp-mach.h"
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#include "../mach-config.h"
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#define DRV_NAME "acp_asoc_acp63"
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#define CLK_PLL_PWR_REQ_N0 0X0006C2C0
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#define CLK_SPLL_FIELD_2_N0 0X0006C114
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#define CLK_PLL_REQ_N0 0X0006C0DC
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#define CLK_DFSBYPASS_CONTR 0X0006C2C8
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#define CLK_DFS_CNTL_N0 0X0006C1A4
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#define PLL_AUTO_STOP_REQ BIT(4)
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#define PLL_AUTO_START_REQ BIT(0)
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#define PLL_FRANCE_EN BIT(4)
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#define EXIT_DPF_BYPASS_0 BIT(16)
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#define EXIT_DPF_BYPASS_1 BIT(17)
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#define CLK0_DIVIDER 0X30
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union clk_pll_req_no {
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struct {
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u32 fb_mult_int : 9;
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u32 reserved : 3;
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u32 pll_spine_div : 4;
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u32 gb_mult_frac : 16;
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} bitfields, bits;
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u32 clk_pll_req_no_reg;
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};
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static struct acp_resource rsrc = {
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.offset = 0,
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.no_of_ctrls = 2,
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.irqp_used = 1,
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.soc_mclk = true,
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.irq_reg_offset = 0x1a00,
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.i2s_pin_cfg_offset = 0x1440,
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.i2s_mode = 0x0a,
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.scratch_reg_offset = 0x12800,
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.sram_pte_offset = 0x03802800,
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};
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static struct snd_soc_acpi_mach snd_soc_acpi_amd_acp63_acp_machines[] = {
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{
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.id = "AMDI0052",
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.drv_name = "acp63-acp",
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},
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{},
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};
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static struct snd_soc_dai_driver acp63_dai[] = {
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{
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.name = "acp-i2s-sp",
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.id = I2S_SP_INSTANCE,
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.playback = {
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.stream_name = "I2S SP Playback",
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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},
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.capture = {
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.stream_name = "I2S SP Capture",
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rate_min = 8000,
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.rate_max = 48000,
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},
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.ops = &asoc_acp_cpu_dai_ops,
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},
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{
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.name = "acp-i2s-bt",
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.id = I2S_BT_INSTANCE,
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.playback = {
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.stream_name = "I2S BT Playback",
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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},
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.capture = {
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.stream_name = "I2S BT Capture",
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rate_min = 8000,
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.rate_max = 48000,
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},
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.ops = &asoc_acp_cpu_dai_ops,
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},
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{
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.name = "acp-i2s-hs",
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.id = I2S_HS_INSTANCE,
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.playback = {
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.stream_name = "I2S HS Playback",
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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},
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.capture = {
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.stream_name = "I2S HS Capture",
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 48000,
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},
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.ops = &asoc_acp_cpu_dai_ops,
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},
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{
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.name = "acp-pdm-dmic",
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.id = DMIC_INSTANCE,
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.capture = {
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rate_min = 8000,
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.rate_max = 48000,
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},
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.ops = &acp_dmic_dai_ops,
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},
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};
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static int acp63_i2s_master_clock_generate(struct acp_dev_data *adata)
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{
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u32 data;
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union clk_pll_req_no clk_pll;
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struct pci_dev *smn_dev;
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smn_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x14E8, NULL);
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if (!smn_dev)
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return -ENODEV;
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/* Clk5 pll register values to get mclk as 196.6MHz*/
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clk_pll.bits.fb_mult_int = 0x31;
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clk_pll.bits.pll_spine_div = 0;
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clk_pll.bits.gb_mult_frac = 0x26E9;
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data = smn_read(smn_dev, CLK_PLL_PWR_REQ_N0);
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smn_write(smn_dev, CLK_PLL_PWR_REQ_N0, data | PLL_AUTO_STOP_REQ);
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data = smn_read(smn_dev, CLK_SPLL_FIELD_2_N0);
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if (data & PLL_FRANCE_EN)
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smn_write(smn_dev, CLK_SPLL_FIELD_2_N0, data | PLL_FRANCE_EN);
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smn_write(smn_dev, CLK_PLL_REQ_N0, clk_pll.clk_pll_req_no_reg);
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data = smn_read(smn_dev, CLK_PLL_PWR_REQ_N0);
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smn_write(smn_dev, CLK_PLL_PWR_REQ_N0, data | PLL_AUTO_START_REQ);
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data = smn_read(smn_dev, CLK_DFSBYPASS_CONTR);
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smn_write(smn_dev, CLK_DFSBYPASS_CONTR, data | EXIT_DPF_BYPASS_0);
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smn_write(smn_dev, CLK_DFSBYPASS_CONTR, data | EXIT_DPF_BYPASS_1);
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smn_write(smn_dev, CLK_DFS_CNTL_N0, CLK0_DIVIDER);
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return 0;
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}
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static int acp63_audio_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct acp_chip_info *chip;
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struct acp_dev_data *adata;
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struct resource *res;
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int ret;
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chip = dev_get_platdata(&pdev->dev);
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if (!chip || !chip->base) {
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dev_err(&pdev->dev, "ACP chip data is NULL\n");
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return -ENODEV;
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}
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if (chip->acp_rev != ACP63_DEV) {
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dev_err(&pdev->dev, "Un-supported ACP Revision %d\n", chip->acp_rev);
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return -ENODEV;
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}
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adata = devm_kzalloc(dev, sizeof(struct acp_dev_data), GFP_KERNEL);
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if (!adata)
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return -ENOMEM;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "acp_mem");
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if (!res) {
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dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n");
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return -ENODEV;
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}
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adata->acp_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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if (!adata->acp_base)
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return -ENOMEM;
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res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "acp_dai_irq");
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if (!res) {
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dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
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return -ENODEV;
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}
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adata->i2s_irq = res->start;
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adata->dev = dev;
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adata->dai_driver = acp63_dai;
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adata->num_dai = ARRAY_SIZE(acp63_dai);
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adata->rsrc = &rsrc;
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adata->platform = ACP63;
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adata->flag = chip->flag;
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adata->machines = snd_soc_acpi_amd_acp63_acp_machines;
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acp_machine_select(adata);
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dev_set_drvdata(dev, adata);
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if (chip->flag != FLAG_AMD_LEGACY_ONLY_DMIC) {
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ret = acp63_i2s_master_clock_generate(adata);
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if (ret)
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return ret;
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}
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acp_enable_interrupts(adata);
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acp_platform_register(dev);
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pm_runtime_set_autosuspend_delay(&pdev->dev, ACP_SUSPEND_DELAY_MS);
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pm_runtime_use_autosuspend(&pdev->dev);
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pm_runtime_mark_last_busy(&pdev->dev);
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pm_runtime_set_active(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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return 0;
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}
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static void acp63_audio_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct acp_dev_data *adata = dev_get_drvdata(dev);
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acp_disable_interrupts(adata);
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acp_platform_unregister(dev);
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pm_runtime_disable(&pdev->dev);
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}
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static int __maybe_unused acp63_pcm_resume(struct device *dev)
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{
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struct acp_dev_data *adata = dev_get_drvdata(dev);
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struct acp_stream *stream;
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struct snd_pcm_substream *substream;
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snd_pcm_uframes_t buf_in_frames;
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u64 buf_size;
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if (adata->flag != FLAG_AMD_LEGACY_ONLY_DMIC)
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acp63_i2s_master_clock_generate(adata);
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spin_lock(&adata->acp_lock);
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list_for_each_entry(stream, &adata->stream_list, list) {
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substream = stream->substream;
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if (substream && substream->runtime) {
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buf_in_frames = (substream->runtime->buffer_size);
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buf_size = frames_to_bytes(substream->runtime, buf_in_frames);
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config_pte_for_stream(adata, stream);
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config_acp_dma(adata, stream, buf_size);
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if (stream->dai_id)
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restore_acp_i2s_params(substream, adata, stream);
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else
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restore_acp_pdm_params(substream, adata);
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}
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}
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spin_unlock(&adata->acp_lock);
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return 0;
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}
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static const struct dev_pm_ops acp63_dma_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(NULL, acp63_pcm_resume)
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};
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static struct platform_driver acp63_driver = {
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.probe = acp63_audio_probe,
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.remove_new = acp63_audio_remove,
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.driver = {
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.name = "acp_asoc_acp63",
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.pm = &acp63_dma_pm_ops,
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},
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};
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module_platform_driver(acp63_driver);
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MODULE_DESCRIPTION("AMD ACP acp63 Driver");
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MODULE_IMPORT_NS(SND_SOC_ACP_COMMON);
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_ALIAS("platform:" DRV_NAME);
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