662 lines
16 KiB
C
662 lines
16 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#include "xe_device.h"
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#include <linux/units.h>
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#include <drm/drm_aperture.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_gem_ttm_helper.h>
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#include <drm/drm_ioctl.h>
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#include <drm/drm_managed.h>
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#include <drm/drm_print.h>
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#include <drm/xe_drm.h>
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#include "regs/xe_gt_regs.h"
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#include "regs/xe_regs.h"
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#include "xe_bo.h"
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#include "xe_debugfs.h"
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#include "xe_display.h"
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#include "xe_dma_buf.h"
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#include "xe_drm_client.h"
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#include "xe_drv.h"
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#include "xe_exec_queue.h"
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#include "xe_exec.h"
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#include "xe_ggtt.h"
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#include "xe_gt.h"
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#include "xe_gt_mcr.h"
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#include "xe_irq.h"
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#include "xe_mmio.h"
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#include "xe_module.h"
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#include "xe_pat.h"
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#include "xe_pcode.h"
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#include "xe_pm.h"
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#include "xe_query.h"
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#include "xe_tile.h"
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#include "xe_ttm_stolen_mgr.h"
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#include "xe_ttm_sys_mgr.h"
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#include "xe_vm.h"
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#include "xe_wait_user_fence.h"
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#include "xe_hwmon.h"
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#ifdef CONFIG_LOCKDEP
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struct lockdep_map xe_device_mem_access_lockdep_map = {
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.name = "xe_device_mem_access_lockdep_map"
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};
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#endif
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static int xe_file_open(struct drm_device *dev, struct drm_file *file)
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{
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struct xe_device *xe = to_xe_device(dev);
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struct xe_drm_client *client;
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struct xe_file *xef;
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int ret = -ENOMEM;
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xef = kzalloc(sizeof(*xef), GFP_KERNEL);
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if (!xef)
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return ret;
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client = xe_drm_client_alloc();
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if (!client) {
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kfree(xef);
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return ret;
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}
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xef->drm = file;
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xef->client = client;
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xef->xe = xe;
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mutex_init(&xef->vm.lock);
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xa_init_flags(&xef->vm.xa, XA_FLAGS_ALLOC1);
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mutex_init(&xef->exec_queue.lock);
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xa_init_flags(&xef->exec_queue.xa, XA_FLAGS_ALLOC1);
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spin_lock(&xe->clients.lock);
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xe->clients.count++;
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spin_unlock(&xe->clients.lock);
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file->driver_priv = xef;
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return 0;
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}
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static void xe_file_close(struct drm_device *dev, struct drm_file *file)
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{
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struct xe_device *xe = to_xe_device(dev);
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struct xe_file *xef = file->driver_priv;
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struct xe_vm *vm;
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struct xe_exec_queue *q;
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unsigned long idx;
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mutex_lock(&xef->exec_queue.lock);
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xa_for_each(&xef->exec_queue.xa, idx, q) {
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xe_exec_queue_kill(q);
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xe_exec_queue_put(q);
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}
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mutex_unlock(&xef->exec_queue.lock);
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xa_destroy(&xef->exec_queue.xa);
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mutex_destroy(&xef->exec_queue.lock);
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mutex_lock(&xef->vm.lock);
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xa_for_each(&xef->vm.xa, idx, vm)
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xe_vm_close_and_put(vm);
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mutex_unlock(&xef->vm.lock);
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xa_destroy(&xef->vm.xa);
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mutex_destroy(&xef->vm.lock);
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spin_lock(&xe->clients.lock);
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xe->clients.count--;
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spin_unlock(&xe->clients.lock);
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xe_drm_client_put(xef->client);
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kfree(xef);
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}
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static const struct drm_ioctl_desc xe_ioctls[] = {
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DRM_IOCTL_DEF_DRV(XE_DEVICE_QUERY, xe_query_ioctl, DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(XE_GEM_CREATE, xe_gem_create_ioctl, DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(XE_GEM_MMAP_OFFSET, xe_gem_mmap_offset_ioctl,
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DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(XE_VM_CREATE, xe_vm_create_ioctl, DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(XE_VM_DESTROY, xe_vm_destroy_ioctl, DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(XE_VM_BIND, xe_vm_bind_ioctl, DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(XE_EXEC, xe_exec_ioctl, DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_CREATE, xe_exec_queue_create_ioctl,
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DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_DESTROY, xe_exec_queue_destroy_ioctl,
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DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_GET_PROPERTY, xe_exec_queue_get_property_ioctl,
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DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(XE_WAIT_USER_FENCE, xe_wait_user_fence_ioctl,
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DRM_RENDER_ALLOW),
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};
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static const struct file_operations xe_driver_fops = {
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.owner = THIS_MODULE,
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.open = drm_open,
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.release = drm_release_noglobal,
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.unlocked_ioctl = drm_ioctl,
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.mmap = drm_gem_mmap,
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.poll = drm_poll,
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.read = drm_read,
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.compat_ioctl = drm_compat_ioctl,
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.llseek = noop_llseek,
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#ifdef CONFIG_PROC_FS
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.show_fdinfo = drm_show_fdinfo,
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#endif
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};
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static void xe_driver_release(struct drm_device *dev)
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{
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struct xe_device *xe = to_xe_device(dev);
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pci_set_drvdata(to_pci_dev(xe->drm.dev), NULL);
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}
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static struct drm_driver driver = {
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/* Don't use MTRRs here; the Xserver or userspace app should
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* deal with them for Intel hardware.
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*/
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.driver_features =
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DRIVER_GEM |
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DRIVER_RENDER | DRIVER_SYNCOBJ |
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DRIVER_SYNCOBJ_TIMELINE | DRIVER_GEM_GPUVA,
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.open = xe_file_open,
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.postclose = xe_file_close,
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.gem_prime_import = xe_gem_prime_import,
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.dumb_create = xe_bo_dumb_create,
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.dumb_map_offset = drm_gem_ttm_dumb_map_offset,
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#ifdef CONFIG_PROC_FS
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.show_fdinfo = xe_drm_client_fdinfo,
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#endif
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.release = &xe_driver_release,
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.ioctls = xe_ioctls,
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.num_ioctls = ARRAY_SIZE(xe_ioctls),
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.fops = &xe_driver_fops,
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.date = DRIVER_DATE,
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.major = DRIVER_MAJOR,
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.minor = DRIVER_MINOR,
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.patchlevel = DRIVER_PATCHLEVEL,
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};
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static void xe_device_destroy(struct drm_device *dev, void *dummy)
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{
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struct xe_device *xe = to_xe_device(dev);
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if (xe->ordered_wq)
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destroy_workqueue(xe->ordered_wq);
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if (xe->unordered_wq)
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destroy_workqueue(xe->unordered_wq);
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ttm_device_fini(&xe->ttm);
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}
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struct xe_device *xe_device_create(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct xe_device *xe;
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int err;
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xe_display_driver_set_hooks(&driver);
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err = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &driver);
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if (err)
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return ERR_PTR(err);
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xe = devm_drm_dev_alloc(&pdev->dev, &driver, struct xe_device, drm);
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if (IS_ERR(xe))
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return xe;
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err = ttm_device_init(&xe->ttm, &xe_ttm_funcs, xe->drm.dev,
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xe->drm.anon_inode->i_mapping,
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xe->drm.vma_offset_manager, false, false);
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if (WARN_ON(err))
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goto err;
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err = drmm_add_action_or_reset(&xe->drm, xe_device_destroy, NULL);
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if (err)
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goto err;
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xe->info.devid = pdev->device;
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xe->info.revid = pdev->revision;
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xe->info.force_execlist = xe_modparam.force_execlist;
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spin_lock_init(&xe->irq.lock);
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spin_lock_init(&xe->clients.lock);
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init_waitqueue_head(&xe->ufence_wq);
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drmm_mutex_init(&xe->drm, &xe->usm.lock);
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xa_init_flags(&xe->usm.asid_to_vm, XA_FLAGS_ALLOC);
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if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) {
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/* Trigger a large asid and an early asid wrap. */
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u32 asid;
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BUILD_BUG_ON(XE_MAX_ASID < 2);
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err = xa_alloc_cyclic(&xe->usm.asid_to_vm, &asid, NULL,
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XA_LIMIT(XE_MAX_ASID - 2, XE_MAX_ASID - 1),
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&xe->usm.next_asid, GFP_KERNEL);
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drm_WARN_ON(&xe->drm, err);
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if (err >= 0)
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xa_erase(&xe->usm.asid_to_vm, asid);
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}
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spin_lock_init(&xe->pinned.lock);
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INIT_LIST_HEAD(&xe->pinned.kernel_bo_present);
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INIT_LIST_HEAD(&xe->pinned.external_vram);
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INIT_LIST_HEAD(&xe->pinned.evicted);
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xe->ordered_wq = alloc_ordered_workqueue("xe-ordered-wq", 0);
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xe->unordered_wq = alloc_workqueue("xe-unordered-wq", 0, 0);
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if (!xe->ordered_wq || !xe->unordered_wq) {
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drm_err(&xe->drm, "Failed to allocate xe workqueues\n");
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err = -ENOMEM;
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goto err;
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}
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err = xe_display_create(xe);
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if (WARN_ON(err))
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goto err;
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return xe;
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err:
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return ERR_PTR(err);
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}
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/*
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* The driver-initiated FLR is the highest level of reset that we can trigger
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* from within the driver. It is different from the PCI FLR in that it doesn't
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* fully reset the SGUnit and doesn't modify the PCI config space and therefore
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* it doesn't require a re-enumeration of the PCI BARs. However, the
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* driver-initiated FLR does still cause a reset of both GT and display and a
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* memory wipe of local and stolen memory, so recovery would require a full HW
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* re-init and saving/restoring (or re-populating) the wiped memory. Since we
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* perform the FLR as the very last action before releasing access to the HW
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* during the driver release flow, we don't attempt recovery at all, because
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* if/when a new instance of i915 is bound to the device it will do a full
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* re-init anyway.
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*/
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static void xe_driver_flr(struct xe_device *xe)
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{
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const unsigned int flr_timeout = 3 * MICRO; /* specs recommend a 3s wait */
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struct xe_gt *gt = xe_root_mmio_gt(xe);
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int ret;
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if (xe_mmio_read32(gt, GU_CNTL_PROTECTED) & DRIVERINT_FLR_DIS) {
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drm_info_once(&xe->drm, "BIOS Disabled Driver-FLR\n");
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return;
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}
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drm_dbg(&xe->drm, "Triggering Driver-FLR\n");
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/*
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* Make sure any pending FLR requests have cleared by waiting for the
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* FLR trigger bit to go to zero. Also clear GU_DEBUG's DRIVERFLR_STATUS
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* to make sure it's not still set from a prior attempt (it's a write to
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* clear bit).
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* Note that we should never be in a situation where a previous attempt
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* is still pending (unless the HW is totally dead), but better to be
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* safe in case something unexpected happens
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*/
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ret = xe_mmio_wait32(gt, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL, false);
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if (ret) {
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drm_err(&xe->drm, "Driver-FLR-prepare wait for ready failed! %d\n", ret);
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return;
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}
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xe_mmio_write32(gt, GU_DEBUG, DRIVERFLR_STATUS);
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/* Trigger the actual Driver-FLR */
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xe_mmio_rmw32(gt, GU_CNTL, 0, DRIVERFLR);
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/* Wait for hardware teardown to complete */
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ret = xe_mmio_wait32(gt, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL, false);
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if (ret) {
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drm_err(&xe->drm, "Driver-FLR-teardown wait completion failed! %d\n", ret);
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return;
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}
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/* Wait for hardware/firmware re-init to complete */
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ret = xe_mmio_wait32(gt, GU_DEBUG, DRIVERFLR_STATUS, DRIVERFLR_STATUS,
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flr_timeout, NULL, false);
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if (ret) {
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drm_err(&xe->drm, "Driver-FLR-reinit wait completion failed! %d\n", ret);
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return;
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}
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/* Clear sticky completion status */
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xe_mmio_write32(gt, GU_DEBUG, DRIVERFLR_STATUS);
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}
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static void xe_driver_flr_fini(struct drm_device *drm, void *arg)
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{
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struct xe_device *xe = arg;
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if (xe->needs_flr_on_fini)
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xe_driver_flr(xe);
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}
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static void xe_device_sanitize(struct drm_device *drm, void *arg)
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{
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struct xe_device *xe = arg;
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struct xe_gt *gt;
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u8 id;
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for_each_gt(gt, xe, id)
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xe_gt_sanitize(gt);
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}
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static int xe_set_dma_info(struct xe_device *xe)
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{
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unsigned int mask_size = xe->info.dma_mask_size;
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int err;
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dma_set_max_seg_size(xe->drm.dev, xe_sg_segment_size(xe->drm.dev));
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err = dma_set_mask(xe->drm.dev, DMA_BIT_MASK(mask_size));
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if (err)
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goto mask_err;
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err = dma_set_coherent_mask(xe->drm.dev, DMA_BIT_MASK(mask_size));
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if (err)
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goto mask_err;
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return 0;
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mask_err:
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drm_err(&xe->drm, "Can't set DMA mask/consistent mask (%d)\n", err);
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return err;
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}
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/*
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* Initialize MMIO resources that don't require any knowledge about tile count.
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*/
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int xe_device_probe_early(struct xe_device *xe)
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{
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int err;
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err = xe_mmio_init(xe);
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if (err)
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return err;
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err = xe_mmio_root_tile_init(xe);
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if (err)
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return err;
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return 0;
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}
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static int xe_device_set_has_flat_ccs(struct xe_device *xe)
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{
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u32 reg;
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int err;
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if (GRAPHICS_VER(xe) < 20 || !xe->info.has_flat_ccs)
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return 0;
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struct xe_gt *gt = xe_root_mmio_gt(xe);
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err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
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if (err)
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return err;
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reg = xe_gt_mcr_unicast_read_any(gt, XE2_FLAT_CCS_BASE_RANGE_LOWER);
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xe->info.has_flat_ccs = (reg & XE2_FLAT_CCS_ENABLE);
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if (!xe->info.has_flat_ccs)
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drm_dbg(&xe->drm,
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"Flat CCS has been disabled in bios, May lead to performance impact");
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return xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
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}
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int xe_device_probe(struct xe_device *xe)
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{
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struct xe_tile *tile;
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struct xe_gt *gt;
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int err;
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u8 id;
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xe_pat_init_early(xe);
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xe->info.mem_region_mask = 1;
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err = xe_display_init_nommio(xe);
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if (err)
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return err;
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err = xe_set_dma_info(xe);
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if (err)
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return err;
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xe_mmio_probe_tiles(xe);
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xe_ttm_sys_mgr_init(xe);
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for_each_gt(gt, xe, id)
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xe_force_wake_init_gt(gt, gt_to_fw(gt));
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for_each_tile(tile, xe, id) {
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err = xe_ggtt_init_early(tile->mem.ggtt);
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if (err)
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return err;
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}
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err = drmm_add_action_or_reset(&xe->drm, xe_driver_flr_fini, xe);
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if (err)
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return err;
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for_each_gt(gt, xe, id) {
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err = xe_pcode_probe(gt);
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if (err)
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return err;
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}
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err = xe_display_init_noirq(xe);
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if (err)
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return err;
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err = xe_irq_install(xe);
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if (err)
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goto err;
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for_each_gt(gt, xe, id) {
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err = xe_gt_init_early(gt);
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if (err)
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goto err_irq_shutdown;
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}
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err = xe_device_set_has_flat_ccs(xe);
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if (err)
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goto err_irq_shutdown;
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err = xe_mmio_probe_vram(xe);
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if (err)
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goto err_irq_shutdown;
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for_each_tile(tile, xe, id) {
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err = xe_tile_init_noalloc(tile);
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if (err)
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goto err_irq_shutdown;
|
|
}
|
|
|
|
/* Allocate and map stolen after potential VRAM resize */
|
|
xe_ttm_stolen_mgr_init(xe);
|
|
|
|
/*
|
|
* Now that GT is initialized (TTM in particular),
|
|
* we can try to init display, and inherit the initial fb.
|
|
* This is the reason the first allocation needs to be done
|
|
* inside display.
|
|
*/
|
|
err = xe_display_init_noaccel(xe);
|
|
if (err)
|
|
goto err_irq_shutdown;
|
|
|
|
for_each_gt(gt, xe, id) {
|
|
err = xe_gt_init(gt);
|
|
if (err)
|
|
goto err_irq_shutdown;
|
|
}
|
|
|
|
xe_heci_gsc_init(xe);
|
|
|
|
err = xe_display_init(xe);
|
|
if (err)
|
|
goto err_irq_shutdown;
|
|
|
|
err = drm_dev_register(&xe->drm, 0);
|
|
if (err)
|
|
goto err_fini_display;
|
|
|
|
xe_display_register(xe);
|
|
|
|
xe_debugfs_register(xe);
|
|
|
|
xe_hwmon_register(xe);
|
|
|
|
err = drmm_add_action_or_reset(&xe->drm, xe_device_sanitize, xe);
|
|
if (err)
|
|
return err;
|
|
|
|
return 0;
|
|
|
|
err_fini_display:
|
|
xe_display_driver_remove(xe);
|
|
|
|
err_irq_shutdown:
|
|
xe_irq_shutdown(xe);
|
|
err:
|
|
xe_display_fini(xe);
|
|
return err;
|
|
}
|
|
|
|
static void xe_device_remove_display(struct xe_device *xe)
|
|
{
|
|
xe_display_unregister(xe);
|
|
|
|
drm_dev_unplug(&xe->drm);
|
|
xe_display_driver_remove(xe);
|
|
}
|
|
|
|
void xe_device_remove(struct xe_device *xe)
|
|
{
|
|
xe_device_remove_display(xe);
|
|
|
|
xe_display_fini(xe);
|
|
|
|
xe_heci_gsc_fini(xe);
|
|
|
|
xe_irq_shutdown(xe);
|
|
}
|
|
|
|
void xe_device_shutdown(struct xe_device *xe)
|
|
{
|
|
}
|
|
|
|
void xe_device_wmb(struct xe_device *xe)
|
|
{
|
|
struct xe_gt *gt = xe_root_mmio_gt(xe);
|
|
|
|
wmb();
|
|
if (IS_DGFX(xe))
|
|
xe_mmio_write32(gt, SOFTWARE_FLAGS_SPR33, 0);
|
|
}
|
|
|
|
u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size)
|
|
{
|
|
return xe_device_has_flat_ccs(xe) ?
|
|
DIV_ROUND_UP_ULL(size, NUM_BYTES_PER_CCS_BYTE(xe)) : 0;
|
|
}
|
|
|
|
bool xe_device_mem_access_ongoing(struct xe_device *xe)
|
|
{
|
|
if (xe_pm_read_callback_task(xe) != NULL)
|
|
return true;
|
|
|
|
return atomic_read(&xe->mem_access.ref);
|
|
}
|
|
|
|
void xe_device_assert_mem_access(struct xe_device *xe)
|
|
{
|
|
XE_WARN_ON(!xe_device_mem_access_ongoing(xe));
|
|
}
|
|
|
|
bool xe_device_mem_access_get_if_ongoing(struct xe_device *xe)
|
|
{
|
|
bool active;
|
|
|
|
if (xe_pm_read_callback_task(xe) == current)
|
|
return true;
|
|
|
|
active = xe_pm_runtime_get_if_active(xe);
|
|
if (active) {
|
|
int ref = atomic_inc_return(&xe->mem_access.ref);
|
|
|
|
xe_assert(xe, ref != S32_MAX);
|
|
}
|
|
|
|
return active;
|
|
}
|
|
|
|
void xe_device_mem_access_get(struct xe_device *xe)
|
|
{
|
|
int ref;
|
|
|
|
/*
|
|
* This looks racy, but should be fine since the pm_callback_task only
|
|
* transitions from NULL -> current (and back to NULL again), during the
|
|
* runtime_resume() or runtime_suspend() callbacks, for which there can
|
|
* only be a single one running for our device. We only need to prevent
|
|
* recursively calling the runtime_get or runtime_put from those
|
|
* callbacks, as well as preventing triggering any access_ongoing
|
|
* asserts.
|
|
*/
|
|
if (xe_pm_read_callback_task(xe) == current)
|
|
return;
|
|
|
|
/*
|
|
* Since the resume here is synchronous it can be quite easy to deadlock
|
|
* if we are not careful. Also in practice it might be quite timing
|
|
* sensitive to ever see the 0 -> 1 transition with the callers locks
|
|
* held, so deadlocks might exist but are hard for lockdep to ever see.
|
|
* With this in mind, help lockdep learn about the potentially scary
|
|
* stuff that can happen inside the runtime_resume callback by acquiring
|
|
* a dummy lock (it doesn't protect anything and gets compiled out on
|
|
* non-debug builds). Lockdep then only needs to see the
|
|
* mem_access_lockdep_map -> runtime_resume callback once, and then can
|
|
* hopefully validate all the (callers_locks) -> mem_access_lockdep_map.
|
|
* For example if the (callers_locks) are ever grabbed in the
|
|
* runtime_resume callback, lockdep should give us a nice splat.
|
|
*/
|
|
lock_map_acquire(&xe_device_mem_access_lockdep_map);
|
|
lock_map_release(&xe_device_mem_access_lockdep_map);
|
|
|
|
xe_pm_runtime_get(xe);
|
|
ref = atomic_inc_return(&xe->mem_access.ref);
|
|
|
|
xe_assert(xe, ref != S32_MAX);
|
|
|
|
}
|
|
|
|
void xe_device_mem_access_put(struct xe_device *xe)
|
|
{
|
|
int ref;
|
|
|
|
if (xe_pm_read_callback_task(xe) == current)
|
|
return;
|
|
|
|
ref = atomic_dec_return(&xe->mem_access.ref);
|
|
xe_pm_runtime_put(xe);
|
|
|
|
xe_assert(xe, ref >= 0);
|
|
}
|