771 lines
18 KiB
C
771 lines
18 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2003 Ralf Baechle
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*/
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#ifndef _ASM_PGTABLE_H
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#define _ASM_PGTABLE_H
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#include <linux/mm_types.h>
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#include <linux/mmzone.h>
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#ifdef CONFIG_32BIT
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#include <asm/pgtable-32.h>
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#endif
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#ifdef CONFIG_64BIT
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#include <asm/pgtable-64.h>
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#endif
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#include <asm/cmpxchg.h>
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#include <asm/io.h>
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#include <asm/pgtable-bits.h>
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#include <asm/cpu-features.h>
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struct mm_struct;
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struct vm_area_struct;
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#define PAGE_SHARED vm_get_page_prot(VM_READ|VM_WRITE|VM_SHARED)
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#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
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_PAGE_GLOBAL | _page_cachable_default)
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#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
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_PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
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#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
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__WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
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/*
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* If _PAGE_NO_EXEC is not defined, we can't do page protection for
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* execute, and consider it to be the same as read. Also, write
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* permissions imply read permissions. This is the closest we can get
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* by reasonable means..
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*/
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extern unsigned long _page_cachable_default;
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extern void __update_cache(unsigned long address, pte_t pte);
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/*
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* ZERO_PAGE is a global shared page that is always zero; used
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* for zero-mapped memory areas etc..
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*/
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extern unsigned long empty_zero_page;
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extern unsigned long zero_page_mask;
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#define ZERO_PAGE(vaddr) \
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(virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
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#define __HAVE_COLOR_ZERO_PAGE
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extern void paging_init(void);
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/*
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* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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*/
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#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
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static inline unsigned long pmd_pfn(pmd_t pmd)
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{
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return pmd_val(pmd) >> PFN_PTE_SHIFT;
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}
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#ifndef CONFIG_MIPS_HUGE_TLB_SUPPORT
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#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
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#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
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#define pmd_page_vaddr(pmd) pmd_val(pmd)
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#define htw_stop() \
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do { \
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unsigned long __flags; \
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\
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if (cpu_has_htw) { \
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local_irq_save(__flags); \
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if(!raw_current_cpu_data.htw_seq++) { \
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write_c0_pwctl(read_c0_pwctl() & \
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~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
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back_to_back_c0_hazard(); \
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} \
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local_irq_restore(__flags); \
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} \
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} while(0)
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#define htw_start() \
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do { \
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unsigned long __flags; \
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\
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if (cpu_has_htw) { \
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local_irq_save(__flags); \
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if (!--raw_current_cpu_data.htw_seq) { \
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write_c0_pwctl(read_c0_pwctl() | \
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(1 << MIPS_PWCTL_PWEN_SHIFT)); \
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back_to_back_c0_hazard(); \
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} \
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local_irq_restore(__flags); \
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} \
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} while(0)
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#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
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#ifdef CONFIG_XPA
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# define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
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#else
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# define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
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#endif
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#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
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#define pte_no_exec(pte) ((pte).pte_low & _PAGE_NO_EXEC)
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static inline void set_pte(pte_t *ptep, pte_t pte)
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{
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ptep->pte_high = pte.pte_high;
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smp_wmb();
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ptep->pte_low = pte.pte_low;
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#ifdef CONFIG_XPA
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if (pte.pte_high & _PAGE_GLOBAL) {
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#else
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if (pte.pte_low & _PAGE_GLOBAL) {
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#endif
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pte_t *buddy = ptep_buddy(ptep);
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/*
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* Make sure the buddy is global too (if it's !none,
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* it better already be global)
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*/
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if (pte_none(*buddy)) {
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if (!IS_ENABLED(CONFIG_XPA))
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buddy->pte_low |= _PAGE_GLOBAL;
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buddy->pte_high |= _PAGE_GLOBAL;
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}
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}
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}
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static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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pte_t null = __pte(0);
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htw_stop();
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/* Preserve global status for the pair */
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if (IS_ENABLED(CONFIG_XPA)) {
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if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
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null.pte_high = _PAGE_GLOBAL;
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} else {
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if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
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null.pte_low = null.pte_high = _PAGE_GLOBAL;
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}
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set_pte(ptep, null);
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htw_start();
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}
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#else
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#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
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#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
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#define pte_no_exec(pte) (pte_val(pte) & _PAGE_NO_EXEC)
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/*
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* Certain architectures need to do special things when pte's
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* within a page table are directly modified. Thus, the following
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* hook is made available.
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*/
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static inline void set_pte(pte_t *ptep, pte_t pteval)
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{
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*ptep = pteval;
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#if !defined(CONFIG_CPU_R3K_TLB)
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if (pte_val(pteval) & _PAGE_GLOBAL) {
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pte_t *buddy = ptep_buddy(ptep);
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/*
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* Make sure the buddy is global too (if it's !none,
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* it better already be global)
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*/
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# if defined(CONFIG_PHYS_ADDR_T_64BIT) && !defined(CONFIG_CPU_MIPS32)
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cmpxchg64(&buddy->pte, 0, _PAGE_GLOBAL);
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# else
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cmpxchg(&buddy->pte, 0, _PAGE_GLOBAL);
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# endif
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}
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#endif
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}
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static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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htw_stop();
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#if !defined(CONFIG_CPU_R3K_TLB)
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/* Preserve global status for the pair */
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if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
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set_pte(ptep, __pte(_PAGE_GLOBAL));
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else
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#endif
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set_pte(ptep, __pte(0));
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htw_start();
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}
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#endif
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static inline void set_ptes(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep, pte_t pte, unsigned int nr)
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{
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unsigned int i;
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bool do_sync = false;
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for (i = 0; i < nr; i++) {
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if (!pte_present(pte))
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continue;
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if (pte_present(ptep[i]) &&
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(pte_pfn(ptep[i]) == pte_pfn(pte)))
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continue;
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do_sync = true;
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}
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if (do_sync)
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__update_cache(addr, pte);
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for (;;) {
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set_pte(ptep, pte);
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if (--nr == 0)
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break;
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ptep++;
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pte = __pte(pte_val(pte) + (1UL << PFN_PTE_SHIFT));
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}
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}
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#define set_ptes set_ptes
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/*
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* (pmds are folded into puds so this doesn't get actually called,
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* but the define is needed for a generic inline function.)
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*/
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#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
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#ifndef __PAGETABLE_PMD_FOLDED
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/*
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* (puds are folded into pgds so this doesn't get actually called,
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* but the define is needed for a generic inline function.)
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*/
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#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
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#endif
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#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
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#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
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#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
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/*
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* We used to declare this array with size but gcc 3.3 and older are not able
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* to find that this expression is a constant, so the size is dropped.
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*/
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extern pgd_t swapper_pg_dir[];
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/*
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* Platform specific pte_special() and pte_mkspecial() definitions
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* are required only when ARCH_HAS_PTE_SPECIAL is enabled.
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*/
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#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
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#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
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static inline int pte_special(pte_t pte)
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{
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return pte.pte_low & _PAGE_SPECIAL;
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}
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static inline pte_t pte_mkspecial(pte_t pte)
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{
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pte.pte_low |= _PAGE_SPECIAL;
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return pte;
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}
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#else
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static inline int pte_special(pte_t pte)
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{
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return pte_val(pte) & _PAGE_SPECIAL;
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}
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static inline pte_t pte_mkspecial(pte_t pte)
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{
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pte_val(pte) |= _PAGE_SPECIAL;
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return pte;
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}
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#endif
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#endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
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static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
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static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
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static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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pte.pte_low &= ~_PAGE_WRITE;
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if (!IS_ENABLED(CONFIG_XPA))
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pte.pte_low &= ~_PAGE_SILENT_WRITE;
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pte.pte_high &= ~_PAGE_SILENT_WRITE;
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return pte;
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}
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static inline pte_t pte_mkclean(pte_t pte)
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{
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pte.pte_low &= ~_PAGE_MODIFIED;
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if (!IS_ENABLED(CONFIG_XPA))
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pte.pte_low &= ~_PAGE_SILENT_WRITE;
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pte.pte_high &= ~_PAGE_SILENT_WRITE;
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return pte;
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}
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static inline pte_t pte_mkold(pte_t pte)
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{
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pte.pte_low &= ~_PAGE_ACCESSED;
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if (!IS_ENABLED(CONFIG_XPA))
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pte.pte_low &= ~_PAGE_SILENT_READ;
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pte.pte_high &= ~_PAGE_SILENT_READ;
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return pte;
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}
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static inline pte_t pte_mkwrite_novma(pte_t pte)
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{
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pte.pte_low |= _PAGE_WRITE;
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if (pte.pte_low & _PAGE_MODIFIED) {
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if (!IS_ENABLED(CONFIG_XPA))
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pte.pte_low |= _PAGE_SILENT_WRITE;
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pte.pte_high |= _PAGE_SILENT_WRITE;
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}
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return pte;
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}
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static inline pte_t pte_mkdirty(pte_t pte)
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{
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pte.pte_low |= _PAGE_MODIFIED;
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if (pte.pte_low & _PAGE_WRITE) {
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if (!IS_ENABLED(CONFIG_XPA))
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pte.pte_low |= _PAGE_SILENT_WRITE;
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pte.pte_high |= _PAGE_SILENT_WRITE;
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}
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return pte;
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}
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static inline pte_t pte_mkyoung(pte_t pte)
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{
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pte.pte_low |= _PAGE_ACCESSED;
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if (!(pte.pte_low & _PAGE_NO_READ)) {
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if (!IS_ENABLED(CONFIG_XPA))
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pte.pte_low |= _PAGE_SILENT_READ;
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pte.pte_high |= _PAGE_SILENT_READ;
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}
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return pte;
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}
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#else
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static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
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static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
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static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
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return pte;
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}
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static inline pte_t pte_mkclean(pte_t pte)
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{
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pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
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return pte;
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}
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static inline pte_t pte_mkold(pte_t pte)
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{
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pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
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return pte;
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}
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static inline pte_t pte_mkwrite_novma(pte_t pte)
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{
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pte_val(pte) |= _PAGE_WRITE;
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if (pte_val(pte) & _PAGE_MODIFIED)
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pte_val(pte) |= _PAGE_SILENT_WRITE;
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return pte;
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}
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static inline pte_t pte_mkdirty(pte_t pte)
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{
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pte_val(pte) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY;
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if (pte_val(pte) & _PAGE_WRITE)
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pte_val(pte) |= _PAGE_SILENT_WRITE;
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return pte;
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}
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static inline pte_t pte_mkyoung(pte_t pte)
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{
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pte_val(pte) |= _PAGE_ACCESSED;
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if (!(pte_val(pte) & _PAGE_NO_READ))
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pte_val(pte) |= _PAGE_SILENT_READ;
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return pte;
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}
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#define pte_sw_mkyoung pte_mkyoung
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#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
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static inline pte_t pte_mkhuge(pte_t pte)
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{
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pte_val(pte) |= _PAGE_HUGE;
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return pte;
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}
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#define pmd_write pmd_write
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static inline int pmd_write(pmd_t pmd)
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{
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return !!(pmd_val(pmd) & _PAGE_WRITE);
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}
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static inline struct page *pmd_page(pmd_t pmd)
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{
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if (pmd_val(pmd) & _PAGE_HUGE)
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return pfn_to_page(pmd_pfn(pmd));
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return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
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}
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#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
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#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
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static inline bool pte_soft_dirty(pte_t pte)
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{
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return pte_val(pte) & _PAGE_SOFT_DIRTY;
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}
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#define pte_swp_soft_dirty pte_soft_dirty
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static inline pte_t pte_mksoft_dirty(pte_t pte)
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{
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pte_val(pte) |= _PAGE_SOFT_DIRTY;
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return pte;
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}
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#define pte_swp_mksoft_dirty pte_mksoft_dirty
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static inline pte_t pte_clear_soft_dirty(pte_t pte)
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{
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pte_val(pte) &= ~(_PAGE_SOFT_DIRTY);
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return pte;
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}
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#define pte_swp_clear_soft_dirty pte_clear_soft_dirty
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#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
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#endif
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/*
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* Macro to make mark a page protection value as "uncacheable". Note
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* that "protection" is really a misnomer here as the protection value
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* contains the memory attribute bits, dirty bits, and various other
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* bits as well.
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*/
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#define pgprot_noncached pgprot_noncached
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static inline pgprot_t pgprot_noncached(pgprot_t _prot)
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{
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unsigned long prot = pgprot_val(_prot);
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prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
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return __pgprot(prot);
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}
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#define pgprot_writecombine pgprot_writecombine
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static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
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{
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unsigned long prot = pgprot_val(_prot);
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/* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
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prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
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return __pgprot(prot);
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}
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static inline void flush_tlb_fix_spurious_fault(struct vm_area_struct *vma,
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unsigned long address,
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pte_t *ptep)
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{
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}
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#define __HAVE_ARCH_PTE_SAME
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static inline int pte_same(pte_t pte_a, pte_t pte_b)
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{
|
|
return pte_val(pte_a) == pte_val(pte_b);
|
|
}
|
|
|
|
#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
|
|
static inline int ptep_set_access_flags(struct vm_area_struct *vma,
|
|
unsigned long address, pte_t *ptep,
|
|
pte_t entry, int dirty)
|
|
{
|
|
if (!pte_same(*ptep, entry))
|
|
set_pte(ptep, entry);
|
|
/*
|
|
* update_mmu_cache will unconditionally execute, handling both
|
|
* the case that the PTE changed and the spurious fault case.
|
|
*/
|
|
return true;
|
|
}
|
|
|
|
/*
|
|
* Conversion functions: convert a page and protection to a page entry,
|
|
* and a page entry and page directory to the page they refer to.
|
|
*/
|
|
#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
|
|
|
|
#if defined(CONFIG_XPA)
|
|
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
|
{
|
|
pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
|
|
pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
|
|
pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK;
|
|
pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
|
|
return pte;
|
|
}
|
|
#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
|
|
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
|
{
|
|
pte.pte_low &= _PAGE_CHG_MASK;
|
|
pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
|
|
pte.pte_low |= pgprot_val(newprot);
|
|
pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
|
|
return pte;
|
|
}
|
|
#else
|
|
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
|
{
|
|
pte_val(pte) &= _PAGE_CHG_MASK;
|
|
pte_val(pte) |= pgprot_val(newprot) & ~_PAGE_CHG_MASK;
|
|
if ((pte_val(pte) & _PAGE_ACCESSED) && !(pte_val(pte) & _PAGE_NO_READ))
|
|
pte_val(pte) |= _PAGE_SILENT_READ;
|
|
return pte;
|
|
}
|
|
#endif
|
|
|
|
#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
|
|
static inline int pte_swp_exclusive(pte_t pte)
|
|
{
|
|
return pte.pte_low & _PAGE_SWP_EXCLUSIVE;
|
|
}
|
|
|
|
static inline pte_t pte_swp_mkexclusive(pte_t pte)
|
|
{
|
|
pte.pte_low |= _PAGE_SWP_EXCLUSIVE;
|
|
return pte;
|
|
}
|
|
|
|
static inline pte_t pte_swp_clear_exclusive(pte_t pte)
|
|
{
|
|
pte.pte_low &= ~_PAGE_SWP_EXCLUSIVE;
|
|
return pte;
|
|
}
|
|
#else
|
|
static inline int pte_swp_exclusive(pte_t pte)
|
|
{
|
|
return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;
|
|
}
|
|
|
|
static inline pte_t pte_swp_mkexclusive(pte_t pte)
|
|
{
|
|
pte_val(pte) |= _PAGE_SWP_EXCLUSIVE;
|
|
return pte;
|
|
}
|
|
|
|
static inline pte_t pte_swp_clear_exclusive(pte_t pte)
|
|
{
|
|
pte_val(pte) &= ~_PAGE_SWP_EXCLUSIVE;
|
|
return pte;
|
|
}
|
|
#endif
|
|
|
|
extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
|
|
pte_t pte);
|
|
|
|
static inline void update_mmu_cache_range(struct vm_fault *vmf,
|
|
struct vm_area_struct *vma, unsigned long address,
|
|
pte_t *ptep, unsigned int nr)
|
|
{
|
|
for (;;) {
|
|
pte_t pte = *ptep;
|
|
__update_tlb(vma, address, pte);
|
|
if (--nr == 0)
|
|
break;
|
|
ptep++;
|
|
address += PAGE_SIZE;
|
|
}
|
|
}
|
|
#define update_mmu_cache(vma, address, ptep) \
|
|
update_mmu_cache_range(NULL, vma, address, ptep, 1)
|
|
|
|
#define __HAVE_ARCH_UPDATE_MMU_TLB
|
|
#define update_mmu_tlb update_mmu_cache
|
|
|
|
static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
|
|
unsigned long address, pmd_t *pmdp)
|
|
{
|
|
pte_t pte = *(pte_t *)pmdp;
|
|
|
|
__update_tlb(vma, address, pte);
|
|
}
|
|
|
|
/*
|
|
* Allow physical addresses to be fixed up to help 36-bit peripherals.
|
|
*/
|
|
#ifdef CONFIG_MIPS_FIXUP_BIGPHYS_ADDR
|
|
phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size);
|
|
int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long vaddr,
|
|
unsigned long pfn, unsigned long size, pgprot_t prot);
|
|
#define io_remap_pfn_range io_remap_pfn_range
|
|
#else
|
|
#define fixup_bigphys_addr(addr, size) (addr)
|
|
#endif /* CONFIG_MIPS_FIXUP_BIGPHYS_ADDR */
|
|
|
|
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
|
|
|
/* We don't have hardware dirty/accessed bits, generic_pmdp_establish is fine.*/
|
|
#define pmdp_establish generic_pmdp_establish
|
|
|
|
#define has_transparent_hugepage has_transparent_hugepage
|
|
extern int has_transparent_hugepage(void);
|
|
|
|
static inline int pmd_trans_huge(pmd_t pmd)
|
|
{
|
|
return !!(pmd_val(pmd) & _PAGE_HUGE);
|
|
}
|
|
|
|
static inline pmd_t pmd_mkhuge(pmd_t pmd)
|
|
{
|
|
pmd_val(pmd) |= _PAGE_HUGE;
|
|
|
|
return pmd;
|
|
}
|
|
|
|
extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
|
pmd_t *pmdp, pmd_t pmd);
|
|
|
|
static inline pmd_t pmd_wrprotect(pmd_t pmd)
|
|
{
|
|
pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
|
|
return pmd;
|
|
}
|
|
|
|
static inline pmd_t pmd_mkwrite_novma(pmd_t pmd)
|
|
{
|
|
pmd_val(pmd) |= _PAGE_WRITE;
|
|
if (pmd_val(pmd) & _PAGE_MODIFIED)
|
|
pmd_val(pmd) |= _PAGE_SILENT_WRITE;
|
|
|
|
return pmd;
|
|
}
|
|
|
|
#define pmd_dirty pmd_dirty
|
|
static inline int pmd_dirty(pmd_t pmd)
|
|
{
|
|
return !!(pmd_val(pmd) & _PAGE_MODIFIED);
|
|
}
|
|
|
|
static inline pmd_t pmd_mkclean(pmd_t pmd)
|
|
{
|
|
pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
|
|
return pmd;
|
|
}
|
|
|
|
static inline pmd_t pmd_mkdirty(pmd_t pmd)
|
|
{
|
|
pmd_val(pmd) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY;
|
|
if (pmd_val(pmd) & _PAGE_WRITE)
|
|
pmd_val(pmd) |= _PAGE_SILENT_WRITE;
|
|
|
|
return pmd;
|
|
}
|
|
|
|
#define pmd_young pmd_young
|
|
static inline int pmd_young(pmd_t pmd)
|
|
{
|
|
return !!(pmd_val(pmd) & _PAGE_ACCESSED);
|
|
}
|
|
|
|
static inline pmd_t pmd_mkold(pmd_t pmd)
|
|
{
|
|
pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
|
|
|
|
return pmd;
|
|
}
|
|
|
|
static inline pmd_t pmd_mkyoung(pmd_t pmd)
|
|
{
|
|
pmd_val(pmd) |= _PAGE_ACCESSED;
|
|
|
|
if (!(pmd_val(pmd) & _PAGE_NO_READ))
|
|
pmd_val(pmd) |= _PAGE_SILENT_READ;
|
|
|
|
return pmd;
|
|
}
|
|
|
|
#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
|
|
static inline int pmd_soft_dirty(pmd_t pmd)
|
|
{
|
|
return !!(pmd_val(pmd) & _PAGE_SOFT_DIRTY);
|
|
}
|
|
|
|
static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
|
|
{
|
|
pmd_val(pmd) |= _PAGE_SOFT_DIRTY;
|
|
return pmd;
|
|
}
|
|
|
|
static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
|
|
{
|
|
pmd_val(pmd) &= ~(_PAGE_SOFT_DIRTY);
|
|
return pmd;
|
|
}
|
|
|
|
#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
|
|
|
|
/* Extern to avoid header file madness */
|
|
extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
|
|
|
|
static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
|
|
{
|
|
pmd_val(pmd) = (pmd_val(pmd) & (_PAGE_CHG_MASK | _PAGE_HUGE)) |
|
|
(pgprot_val(newprot) & ~_PAGE_CHG_MASK);
|
|
return pmd;
|
|
}
|
|
|
|
static inline pmd_t pmd_mkinvalid(pmd_t pmd)
|
|
{
|
|
pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
|
|
|
|
return pmd;
|
|
}
|
|
|
|
/*
|
|
* The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
|
|
* different prototype.
|
|
*/
|
|
#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
|
|
static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
|
|
unsigned long address, pmd_t *pmdp)
|
|
{
|
|
pmd_t old = *pmdp;
|
|
|
|
pmd_clear(pmdp);
|
|
|
|
return old;
|
|
}
|
|
|
|
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|
|
|
|
#ifdef _PAGE_HUGE
|
|
#define pmd_leaf(pmd) ((pmd_val(pmd) & _PAGE_HUGE) != 0)
|
|
#define pud_leaf(pud) ((pud_val(pud) & _PAGE_HUGE) != 0)
|
|
#endif
|
|
|
|
#define gup_fast_permitted(start, end) (!cpu_has_dc_aliases)
|
|
|
|
/*
|
|
* We provide our own get_unmapped area to cope with the virtual aliasing
|
|
* constraints placed on us by the cache architecture.
|
|
*/
|
|
#define HAVE_ARCH_UNMAPPED_AREA
|
|
#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
|
|
|
|
#endif /* _ASM_PGTABLE_H */
|