188 lines
4.2 KiB
Plaintext
188 lines
4.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the White Hawk board with ARD-AUDIO-DA7212 Board
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*
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* You can find and buy "ARD-AUDIO-DA7212" at Digi-Key
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*
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* https://www.digikey.jp/en/products/detail/ARD-AUDIO-DA7212/1564-1021-ND/5456357
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*
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* Copyright (C) 2022 Renesas Electronics Corp.
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*
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*
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* [Connection]
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*
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* White Hawk ARD-AUDIO-DA7212
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* +----------------------------+
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* |CPU board |
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* | |
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* |CN40 (IO PIN HEADER) |
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* | AUDIO_CLKIN_V pin1 |<--\ +---------------+
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* |(*) GP1_25/SL_SW2_V pin2 |<--/ |J2 |
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* | AUDIO_CLKOUT_V pin5 |<----->| pin7 MCLK |
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* | SSI_SCK_V pin9 |<----->| pin1 BCLK |
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* | SSI_WS_V pin13 |<----->| pin3 WCLK |
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* | SSI_SD_V pin15 |<----->| pin5 DATIN | (@)
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* | | \-->| pin15 DATOUT | [CAPTURE]
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* +----------------------------+ +---------------+
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* +----------------------------+
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* |Breakout board |
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* | | +---------------+
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* |CN34 (I2C CN) | |J1 |
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* | I2C0_SCL pin3 |<----->| pin20 SCL |
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* | I2C0_SDA pin5 |<----->| pin18 SDA |
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* | | +---------------+
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* | | +-----------------------+
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* |CN4 (Power) | |J7 |
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* | 3v3 (v) pin9 |<----->| pin4 / pin8 3.3v |
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* | GND (v) pin3 / pin4 |<----->| pin12 / pin14 GND |
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* +----------------------------+ +-----------------------+
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* (*) GP1_25/SL_SW2_V is used as TPU
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* (@) Connect to pin5 (DATIN = playback) or pin15 (DATOUT = capture)
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* (v) These are just sample pins. You can find many 3v3 / GND pins on
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* White Hawk board, not only CN4. You can use other pins for it.
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*
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* [How to enable]
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*
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* You need these configs
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*
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* CONFIG_PWM
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* CONFIG_PWM_RENESAS_TPU
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* CONFIG_COMMON_CLK_PWM
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* CONFIG_SND_SOC_DA7213
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*
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* [How to use]
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*
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* 44.1kHz groups sound is available by default.
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* You need to update audio_clkin settings to switch to 48kHz groups sound.
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* see
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* [(C) clock]
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*
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* You can use capture if you change the settings
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* see
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* [CAPTURE]
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*
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* You need to setup Headphone
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*
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* > amixer set "Headphone" 40%
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* > amixer set "Headphone" on
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* > amixer set "Mixout Left DAC Left" on
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* > amixer set "Mixout Right DAC Right" on
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
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&{/} {
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sound_card: sound {
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compatible = "audio-graph-card";
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label = "rcar-sound";
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dais = <&rsnd_port>; /* DA7212 Audio Codec */
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};
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tpu_clk: tpu-clk {
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compatible = "pwm-clock";
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#clock-cells = <0>;
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/* 44.1kHz groups [(C) clock] */
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clock-frequency = <11289600>;
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pwms = <&tpu 0 88 0>; /* 1000000000 / 88 =~ 11289600 */
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/* 48 kHz groups [(C) clock] */
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// clock-frequency = <12288000>;
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// pwms = <&tpu 0 81 0>; /* 1000000000 / 81 =~ 12288000 */
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};
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};
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&pfc {
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sound_pins: sound {
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groups = "ssi_ctrl", "ssi_data";
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function = "ssi";
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};
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sound_clk_pins: sound-clk {
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groups = "audio_clkin", "audio_clkout";
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function = "audio_clk";
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};
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tpu0_pins: tpu0 {
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groups = "tpu_to0_a";
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function = "tpu";
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};
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};
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&tpu {
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pinctrl-0 = <&tpu0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&i2c0 {
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#address-cells = <1>;
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#size-cells = <0>;
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codec@1a {
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compatible = "dlg,da7212";
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#sound-dai-cells = <0>;
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reg = <0x1a>;
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clocks = <&rcar_sound>;
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clock-names = "mclk";
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dlg,micbias1-lvl = <2500>;
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dlg,micbias2-lvl = <2500>;
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dlg,dmic-data-sel = "lrise_rfall";
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dlg,dmic-samplephase = "between_clkedge";
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dlg,dmic-clkrate = <3000000>;
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VDDA-supply = <®_1p8v>;
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VDDMIC-supply = <®_3p3v>;
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VDDIO-supply = <®_3p3v>;
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port {
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da7212_endpoint: endpoint {
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remote-endpoint = <&rsnd_endpoint>;
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};
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};
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};
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};
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&rcar_sound {
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pinctrl-0 = <&sound_clk_pins>, <&sound_pins>;
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pinctrl-names = "default";
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/* Single DAI */
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#sound-dai-cells = <0>;
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/* audio_clkout */
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#clock-cells = <0>;
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clock-frequency = <5644800>; /* 44.1kHz groups [(C) clock] */
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// clock-frequency = <6144000>; /* 48 kHz groups [(C) clock] */
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status = "okay";
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/* Update <clkin> to <tpu_clk> */
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clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&tpu_clk>;
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ports {
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rsnd_port: port {
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rsnd_endpoint: endpoint {
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remote-endpoint = <&da7212_endpoint>;
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dai-format = "i2s";
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bitclock-master = <&rsnd_endpoint>;
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frame-master = <&rsnd_endpoint>;
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/* Mutually exclusive with 'capture' */
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playback = <&ssi0>;
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/* [CAPTURE] */
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/* capture = <&ssi0>; */
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};
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};
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};
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};
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