147 lines
2.7 KiB
Plaintext
147 lines
2.7 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
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/*
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* Copyright (c) 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
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* D-82229 Seefeld, Germany.
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* Author: Gregor Herburger, Timo Herbrecher
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*
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* Device Tree Include file for MBLS10xxA from TQ (MC related sections)
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*/
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#include <dt-bindings/net/ti-dp83867.h>
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/ {
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sfp1: sfp1 {
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compatible = "sff,sfp";
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i2c-bus = <&sfp1_i2c>;
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mod-def0-gpios = <&gpioexp2 2 GPIO_ACTIVE_LOW>;
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los-gpios = <&gpioexp2 3 GPIO_ACTIVE_HIGH>;
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tx-fault-gpios = <&gpioexp2 0 GPIO_ACTIVE_HIGH>;
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tx-disable-gpios = <&gpioexp2 1 GPIO_ACTIVE_HIGH>;
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};
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sfp2: sfp2 {
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compatible = "sff,sfp";
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i2c-bus = <&sfp2_i2c>;
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mod-def0-gpios = <&gpioexp2 10 GPIO_ACTIVE_LOW>;
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los-gpios = <&gpioexp2 11 GPIO_ACTIVE_HIGH>;
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tx-fault-gpios = <&gpioexp2 8 GPIO_ACTIVE_HIGH>;
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tx-disable-gpios = <&gpioexp2 9 GPIO_ACTIVE_HIGH>;
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};
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};
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&dpmac1 {
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pcs-handle = <&pcs1>;
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};
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&dpmac2 {
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pcs-handle = <&pcs2>;
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};
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&dpmac3 {
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pcs-handle = <&pcs3_0>;
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};
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&dpmac4 {
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pcs-handle = <&pcs3_1>;
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};
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&dpmac5 {
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pcs-handle = <&pcs3_2>;
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};
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&dpmac6 {
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pcs-handle = <&pcs3_3>;
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};
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&dpmac7 {
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pcs-handle = <&pcs7_0>;
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};
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&dpmac8 {
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pcs-handle = <&pcs7_1>;
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};
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&dpmac9 {
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pcs-handle = <&pcs7_2>;
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};
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&dpmac10 {
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pcs-handle = <&pcs7_3>;
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};
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&emdio1 {
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status = "okay";
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qsgmii2_phy1: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x00>;
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};
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qsgmii2_phy2: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x01>;
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};
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qsgmii2_phy3: ethernet-phy@2 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x02>;
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};
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qsgmii2_phy4: ethernet-phy@3 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x03>;
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};
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rgmii_phy2: ethernet-phy@c {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0c>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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};
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rgmii_phy1: ethernet-phy@e {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0e>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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};
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qsgmii1_phy1: ethernet-phy@1c {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x1c>;
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};
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qsgmii1_phy2: ethernet-phy@1d {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x1d>;
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};
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qsgmii1_phy3: ethernet-phy@1e {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x1e>;
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};
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qsgmii1_phy4: ethernet-phy@1f {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x1f>;
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};
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};
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&pcs_mdio1 {
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status = "okay";
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};
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&pcs_mdio2 {
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status = "okay";
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};
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&pcs_mdio3 {
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status = "okay";
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};
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&pcs_mdio7 {
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status = "okay";
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};
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