122 lines
3.1 KiB
Plaintext
122 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 Avnet Embedded GmbH
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*/
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/dts-v1/;
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#include "imx8mp-msc-sm2s-14N0600E.dtsi"
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#include <dt-bindings/clock/imx8mp-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "MSC SM2-MB-EP1 Carrier Board with SM2S-IMX8PLUS-QC6-14N0600E SoM";
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compatible = "avnet,sm2s-imx8mp-14N0600E-ep1",
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"avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp",
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"fsl,imx8mp";
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reg_vcc_3v3_audio: 3v3-audio-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VCC_3V3_AUD";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_vcc_1v8_audio: 1v8-audio-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VCC_1V8_AUD";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "sgtl5000-audio";
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simple-audio-card,format = "i2s";
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simple-audio-card,frame-master = <&codec_dai>;
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simple-audio-card,bitclock-master = <&codec_dai>;
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simple-audio-card,cpu {
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sound-dai = <&sai2>;
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};
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codec_dai: simple-audio-card,codec {
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sound-dai = <&sgtl5000>;
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};
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};
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};
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&i2c1 {
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sgtl5000: audio-codec@a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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assigned-clocks = <&clk IMX8MP_CLK_CLKOUT1_SEL>;
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assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
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assigned-clock-rates = <24000000>;
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clocks = <&clk IMX8MP_CLK_CLKOUT1>;
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#sound-dai-cells = <0>;
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VDDA-supply = <®_vcc_3v3_audio>;
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VDDD-supply = <®_vcc_1v8_audio>;
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VDDIO-supply = <®_vcc_1v8_audio>;
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};
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};
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/* I2S-0 = sai2 */
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&sai2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai2>;
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assigned-clocks = <&clk IMX8MP_CLK_SAI2>;
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assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <12288000>;
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fsl,sai-mclk-direction-output;
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status = "okay";
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};
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&flexcan1 {
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status = "okay";
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};
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&flexcan2 {
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status = "okay";
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};
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&usdhc2 {
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no-1-8-v;
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_smarc_gpio>;
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pinctrl_sai2: sai2grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC 0xd6
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MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6
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MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00 0xd6
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MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6
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>;
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};
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pinctrl_smarc_gpio: smarcgpiosgrp {
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fsl,pins =
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<MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x19>, /* GPIO0 */
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<MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x19>, /* GPIO1 */
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<MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x19>, /* GPIO2 */
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<MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x19>, /* GPIO3 */
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<MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x19>, /* GPIO4 */
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<MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02 0x19>, /* GPIO5 */
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<MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x19>, /* GPIO6 */
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<MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x19>, /* GPIO7 */
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<MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x19>, /* GPIO8 */
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<MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x19>, /* GPIO9 */
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<MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x19>, /* GPIO10 */
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<MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x19>, /* GPIO11 */
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<MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x19>, /* GPIO12 */
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<MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19>; /* GPIO13 */
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};
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};
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