158 lines
3.4 KiB
Plaintext
158 lines
3.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Samsung's Exynos4212 SoC device tree source
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212
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* based board files can include this file and provide values for board specific
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* bindings.
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*
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* Note: This file does not include device nodes for all the controllers in
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* Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional
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* nodes can be added to this file.
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*/
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#include "exynos4x12.dtsi"
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/ {
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compatible = "samsung,exynos4212", "samsung,exynos4";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&cpu0>;
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};
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core1 {
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cpu = <&cpu1>;
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};
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};
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};
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cpu0: cpu@a00 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0xa00>;
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clocks = <&clock CLK_ARM_CLK>;
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clock-names = "cpu";
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operating-points-v2 = <&cpu0_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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};
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cpu1: cpu@a01 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0xa01>;
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clocks = <&clock CLK_ARM_CLK>;
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clock-names = "cpu";
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operating-points-v2 = <&cpu0_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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};
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};
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cpu0_opp_table: opp-table-0 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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opp-microvolt = <900000>;
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clock-latency-ns = <200000>;
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};
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opp-300000000 {
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opp-hz = /bits/ 64 <300000000>;
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opp-microvolt = <900000>;
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clock-latency-ns = <200000>;
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};
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <925000>;
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clock-latency-ns = <200000>;
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};
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opp-500000000 {
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opp-hz = /bits/ 64 <500000000>;
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opp-microvolt = <950000>;
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clock-latency-ns = <200000>;
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};
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opp-600000000 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <975000>;
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clock-latency-ns = <200000>;
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};
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opp-700000000 {
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opp-hz = /bits/ 64 <700000000>;
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opp-microvolt = <987500>;
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clock-latency-ns = <200000>;
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};
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opp-800000000 {
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opp-hz = /bits/ 64 <800000000>;
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opp-microvolt = <1000000>;
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clock-latency-ns = <200000>;
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opp-suspend;
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};
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opp-900000000 {
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opp-hz = /bits/ 64 <900000000>;
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opp-microvolt = <1037500>;
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clock-latency-ns = <200000>;
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};
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opp-1000000000 {
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opp-hz = /bits/ 64 <1000000000>;
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opp-microvolt = <1087500>;
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clock-latency-ns = <200000>;
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};
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opp-1100000000 {
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opp-hz = /bits/ 64 <1100000000>;
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opp-microvolt = <1137500>;
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clock-latency-ns = <200000>;
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};
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opp-1200000000 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <1187500>;
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clock-latency-ns = <200000>;
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};
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opp-1300000000 {
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opp-hz = /bits/ 64 <1300000000>;
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opp-microvolt = <1250000>;
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clock-latency-ns = <200000>;
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};
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opp-1400000000 {
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opp-hz = /bits/ 64 <1400000000>;
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opp-microvolt = <1287500>;
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clock-latency-ns = <200000>;
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};
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cpu0_opp_1500: opp-1500000000 {
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opp-hz = /bits/ 64 <1500000000>;
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opp-microvolt = <1350000>;
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clock-latency-ns = <200000>;
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turbo-mode;
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};
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};
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};
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&clock {
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compatible = "samsung,exynos4212-clock";
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};
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&combiner {
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samsung,combiner-nr = <18>;
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};
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&gic {
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cpu-offset = <0x8000>;
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};
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&pmu {
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interrupts = <2 2>, <3 2>;
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interrupt-affinity = <&cpu0>, <&cpu1>;
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status = "okay";
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};
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&pmu_system_controller {
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compatible = "samsung,exynos4212-pmu", "simple-mfd", "syscon";
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};
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