209 lines
6.0 KiB
YAML
209 lines
6.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Generic Pin Controller with a Single Register for One or More Pins
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maintainers:
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- Tony Lindgren <tony@atomide.com>
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description:
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Some pin controller devices use a single register for one or more pins. The
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range of pin control registers can vary from one to many for each controller
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instance. Some SoCs from Altera, Broadcom, HiSilicon, Ralink, and TI have this
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kind of pin controller instances.
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properties:
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compatible:
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oneOf:
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- enum:
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- pinctrl-single
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- pinconf-single
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- items:
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- enum:
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- ti,am437-padconf
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- ti,am654-padconf
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- ti,dra7-padconf
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- ti,omap2420-padconf
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- ti,omap2430-padconf
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- ti,omap3-padconf
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- ti,omap4-padconf
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- ti,omap5-padconf
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- ti,j7200-padconf
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- const: pinctrl-single
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reg:
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maxItems: 1
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interrupt-controller: true
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'#interrupt-cells':
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const: 1
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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'#pinctrl-cells':
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description:
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Number of cells. Usually 2, consisting of register offset, pin configuration
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value, and pinmux mode. Some controllers may use 1 for just offset and value.
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enum: [ 1, 2 ]
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pinctrl-single,bit-per-mux:
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description: Optional flag to indicate register controls more than one pin
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type: boolean
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pinctrl-single,function-mask:
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description: Mask of the allowed register bits
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$ref: /schemas/types.yaml#/definitions/uint32
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pinctrl-single,function-off:
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description: Optional function off mode for disabled state
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$ref: /schemas/types.yaml#/definitions/uint32
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pinctrl-single,register-width:
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description: Width of pin specific bits in the register
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 8, 16, 32 ]
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pinctrl-single,gpio-range:
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description: Optional list of pin base, nr pins & gpio function
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle of a gpio-range node
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- description: pin base
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- description: number of pins
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- description: gpio function
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'#gpio-range-cells':
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description: No longer needed, may exist in older files for gpio-ranges
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deprecated: true
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const: 3
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gpio-range:
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description: Optional node for gpio range cells
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type: object
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additionalProperties: false
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properties:
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'#pinctrl-single,gpio-range-cells':
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description: Number of gpio range cells
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const: 3
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$ref: /schemas/types.yaml#/definitions/uint32
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patternProperties:
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'-pins(-[0-9]+)?$|-pin$':
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description:
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Pin group node name using naming ending in -pins followed by an optional
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instance number
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type: object
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additionalProperties: false
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properties:
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pinctrl-single,pins:
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description:
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Array of pins as described in pinmux-node.yaml for pinctrl-pin-array
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$ref: /schemas/types.yaml#/definitions/uint32-array
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pinctrl-single,bits:
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description: Register bit configuration for pinctrl-single,bit-per-mux
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: register offset
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- description: value
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- description: pin bitmask in the register
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pinctrl-single,bias-pullup:
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description: Optional bias pull up configuration
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: input
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- description: enabled pull up bits
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- description: disabled pull up bits
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- description: bias pull up mask
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pinctrl-single,bias-pulldown:
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description: Optional bias pull down configuration
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: input
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- description: enabled pull down bits
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- description: disabled pull down bits
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- description: bias pull down mask
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pinctrl-single,drive-strength:
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description: Optional drive strength configuration
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: drive strength current
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- description: drive strength mask
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pinctrl-single,input-schmitt:
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description: Optional input schmitt configuration
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: input
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- description: enable bits
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- description: disable bits
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- description: input schmitt mask
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pinctrl-single,low-power-mode:
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description: Optional low power mode configuration
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: low power mode value
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- description: low power mode mask
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pinctrl-single,slew-rate:
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description: Optional slew rate configuration
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: slew rate
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- description: slew rate mask
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allOf:
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- $ref: pinctrl.yaml#
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required:
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- compatible
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- reg
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- pinctrl-single,register-width
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additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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pinmux@4a100040 {
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compatible = "pinctrl-single";
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reg = <0x4a100040 0x0196>;
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#address-cells = <1>;
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#size-cells = <0>;
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#pinctrl-cells = <2>;
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#interrupt-cells = <1>;
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interrupt-controller;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xffff>;
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pinctrl-single,gpio-range = <&range 0 3 0>;
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range: gpio-range {
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#pinctrl-single,gpio-range-cells = <3>;
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};
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uart2-pins {
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pinctrl-single,pins =
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<0xd8 0x118>,
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<0xda 0>,
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<0xdc 0x118>,
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<0xde 0>;
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};
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};
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};
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