66 lines
2.0 KiB
YAML
66 lines
2.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STi System Configuration Controlled IRQs
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maintainers:
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- Patrice Chotard <patrice.chotard@foss.st.com>
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description:
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On STi based systems; External, CTI (Core Sight), PMU (Performance
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Management), and PL310 L2 Cache IRQs are controlled using System
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Configuration registers. This device is used to unmask them prior to use.
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properties:
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compatible:
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const: st,stih407-irq-syscfg
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st,syscfg:
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description: Phandle to Cortex-A9 IRQ system config registers
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$ref: /schemas/types.yaml#/definitions/phandle
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st,irq-device:
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description: Array of IRQs to enable.
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: Enable the IRQ of the channel one.
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- description: Enable the IRQ of the channel two.
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st,fiq-device:
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description: Array of FIQs to enable.
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: Enable the IRQ of the channel one.
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- description: Enable the IRQ of the channel two.
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st,invert-ext:
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description: External IRQs can be inverted at will. This property inverts
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these three IRQs using bitwise logic, each one being encoded respectively
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on the first, second and fourth bit.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 1, 2, 3, 4, 5, 6 ]
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required:
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- compatible
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- st,syscfg
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- st,irq-device
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- st,fiq-device
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq-st.h>
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irq-syscfg {
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compatible = "st,stih407-irq-syscfg";
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st,syscfg = <&syscfg_cpu>;
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st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
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<ST_IRQ_SYSCFG_PMU_1>;
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st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
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<ST_IRQ_SYSCFG_DISABLED>;
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};
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...
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