72 lines
2.3 KiB
YAML
72 lines
2.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Intel Local Advanced Programmable Interrupt Controller (LAPIC)
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maintainers:
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- Rahul Tanwar <rtanwar@maxlinear.com>
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description: |
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Intel's Advanced Programmable Interrupt Controller (APIC) is a
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family of interrupt controllers. The APIC is a split
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architecture design, with a local component (LAPIC) integrated
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into the processor itself and an external I/O APIC. Local APIC
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(lapic) receives interrupts from the processor's interrupt pins,
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from internal sources and from an external I/O APIC (ioapic).
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And it sends these to the processor core for handling.
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See [1] Chapter 8 for more details.
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Many of the Intel's generic devices like hpet, ioapic, lapic have
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the ce4100 name in their compatible property names because they
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first appeared in CE4100 SoC.
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This schema defines bindings for local APIC interrupt controller.
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[1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf
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properties:
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compatible:
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const: intel,ce4100-lapic
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reg:
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maxItems: 1
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interrupt-controller: true
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'#interrupt-cells':
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const: 2
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intel,virtual-wire-mode:
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description: Intel defines a few possible interrupt delivery
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modes. With respect to boot/init time, mainly two interrupt
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delivery modes are possible.
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PIC Mode - Legacy external 8259 compliant PIC interrupt controller.
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Virtual Wire Mode - use lapic as virtual wire interrupt delivery mode.
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For ACPI or MPS spec compliant systems, it is figured out by some read
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only bit field/s available in their respective defined data structures.
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For OF based systems, it is by default set to PIC mode.
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But if this optional boolean property is set, then the interrupt delivery
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mode is configured to virtual wire compatibility mode.
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type: boolean
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required:
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- compatible
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- reg
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- interrupt-controller
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- '#interrupt-cells'
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additionalProperties: false
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examples:
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- |
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lapic0: interrupt-controller@fee00000 {
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compatible = "intel,ce4100-lapic";
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reg = <0xfee00000 0x1000>;
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interrupt-controller;
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#interrupt-cells = <2>;
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intel,virtual-wire-mode;
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};
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