93 lines
2.2 KiB
YAML
93 lines
2.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/frequency/adi,adf4377.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ADF4377 Microwave Wideband Synthesizer with Integrated VCO
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maintainers:
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- Antoniu Miclaus <antoniu.miclaus@analog.com>
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- Dragos Bogdan <dragos.bogdan@analog.com>
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description: |
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The ADF4377 is a high performance, ultralow jitter, dual output integer-N
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phased locked loop (PLL) with integrated voltage controlled oscillator (VCO)
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ideally suited for data converter and mixed signal front end (MxFE) clock
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applications.
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https://www.analog.com/en/products/adf4377.html
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properties:
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compatible:
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enum:
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- adi,adf4377
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- adi,adf4378
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reg:
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maxItems: 1
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spi-max-frequency:
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maximum: 10000000
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clocks:
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maxItems: 1
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clock-names:
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description:
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External clock that provides reference input frequency.
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items:
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- const: ref_in
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chip-enable-gpios:
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description:
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GPIO that controls the Chip Enable Pin.
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maxItems: 1
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clk1-enable-gpios:
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description:
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GPIO that controls the Enable Clock 1 Output Buffer Pin.
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maxItems: 1
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clk2-enable-gpios:
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description:
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GPIO that controls the Enable Clock 2 Output Buffer Pin.
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maxItems: 1
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adi,muxout-select:
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description:
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On chip multiplexer output selection.
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high_z - MUXOUT Pin set to high-Z.
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lock_detect - MUXOUT Pin set to lock detector output.
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muxout_low - MUXOUT Pin set to low.
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f_div_rclk_2 - MUXOUT Pin set to fDIV_RCLK/2.
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f_div_nclk_2 - MUXOUT Pin set to fDIV_NCLK/2.
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muxout_high - MUXOUT Pin set to high.
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enum: [high_z, lock_detect, muxout_low, f_div_rclk_2, f_div_nclk_2, muxout_high]
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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allOf:
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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unevaluatedProperties: false
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examples:
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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frequency@0 {
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compatible = "adi,adf4377";
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reg = <0>;
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spi-max-frequency = <10000000>;
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clocks = <&adf4377_ref_in>;
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clock-names = "ref_in";
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};
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};
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...
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