81 lines
1.7 KiB
YAML
81 lines
1.7 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/owl-dma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Actions Semi Owl SoCs DMA controller
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description: |
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The OWL DMA is a general-purpose direct memory access controller capable of
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supporting 10 independent DMA channels for the Actions Semi S700 SoC and 12
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independent DMA channels for the S500 and S900 SoC variants.
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maintainers:
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- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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allOf:
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- $ref: dma-controller.yaml#
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properties:
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compatible:
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enum:
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- actions,s500-dma
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- actions,s700-dma
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- actions,s900-dma
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reg:
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maxItems: 1
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interrupts:
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description:
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controller supports 4 interrupts, which are freely assignable to the
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DMA channels.
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maxItems: 4
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"#dma-cells":
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const: 1
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dma-channels:
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maximum: 12
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dma-requests:
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maximum: 46
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clocks:
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maxItems: 1
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description:
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Phandle and Specifier of the clock feeding the DMA controller.
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- "#dma-cells"
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- dma-channels
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- dma-requests
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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dma: dma-controller@e0260000 {
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compatible = "actions,s900-dma";
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reg = <0xe0260000 0x1000>;
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <1>;
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dma-channels = <12>;
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dma-requests = <46>;
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clocks = <&clock 22>;
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};
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...
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