45 lines
1.3 KiB
Plaintext
45 lines
1.3 KiB
Plaintext
* NVIDIA Tegra APB DMA controller
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Required properties:
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- compatible: Should be "nvidia,<chip>-apbdma"
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- reg: Should contain DMA registers location and length. This should include
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all of the per-channel registers.
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- interrupts: Should contain all of the per-channel DMA interrupts.
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- clocks: Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries:
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- dma
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- #dma-cells : Must be <1>. This dictates the length of DMA specifiers in
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client nodes' dmas properties. The specifier represents the DMA request
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select value for the peripheral. For more details, consult the Tegra TRM's
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documentation of the APB DMA channel control register REQ_SEL field.
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Examples:
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apbdma: dma@6000a000 {
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compatible = "nvidia,tegra20-apbdma";
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reg = <0x6000a000 0x1200>;
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interrupts = < 0 136 0x04
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0 137 0x04
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0 138 0x04
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0 139 0x04
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0 140 0x04
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0 141 0x04
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0 142 0x04
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0 143 0x04
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0 144 0x04
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0 145 0x04
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0 146 0x04
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0 147 0x04
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0 148 0x04
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0 149 0x04
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0 150 0x04
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0 151 0x04 >;
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clocks = <&tegra_car 34>;
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resets = <&tegra_car 34>;
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reset-names = "dma";
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#dma-cells = <1>;
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};
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