116 lines
3.0 KiB
YAML
116 lines
3.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX93 specific extensions to Synopsys Designware MIPI DSI
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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description: |
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There is a Synopsys Designware MIPI DSI Host Controller and a Synopsys
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Designware MIPI DPHY embedded in Freescale i.MX93 SoC. Some configurations
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and extensions to them are controlled by i.MX93 media blk-ctrl.
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allOf:
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- $ref: snps,dw-mipi-dsi.yaml#
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properties:
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compatible:
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const: fsl,imx93-mipi-dsi
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clocks:
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items:
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- description: apb clock
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- description: pixel clock
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- description: PHY configuration clock
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- description: PHY reference clock
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clock-names:
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items:
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- const: pclk
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- const: pix
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- const: phy_cfg
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- const: phy_ref
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interrupts:
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maxItems: 1
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fsl,media-blk-ctrl:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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i.MX93 media blk-ctrl, as a syscon, controls pixel component bit map
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configurations from LCDIF display controller to the MIPI DSI host
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controller and MIPI DPHY PLL related configurations through PLL SoC
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interface.
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power-domains:
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maxItems: 1
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required:
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- compatible
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- interrupts
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- fsl,media-blk-ctrl
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- power-domains
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx93-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/fsl,imx93-power.h>
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dsi@4ae10000 {
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compatible = "fsl,imx93-mipi-dsi";
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reg = <0x4ae10000 0x10000>;
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interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX93_CLK_MIPI_DSI_GATE>,
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<&clk IMX93_CLK_MEDIA_DISP_PIX>,
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<&clk IMX93_CLK_MIPI_PHY_CFG>,
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<&clk IMX93_CLK_24M>;
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clock-names = "pclk", "pix", "phy_cfg", "phy_ref";
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fsl,media-blk-ctrl = <&media_blk_ctrl>;
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power-domains = <&media_blk_ctrl IMX93_MEDIABLK_PD_MIPI_DSI>;
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#address-cells = <1>;
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#size-cells = <0>;
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panel@0 {
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compatible = "raydium,rm67191";
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reg = <0>;
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reset-gpios = <&adp5585gpio 6 GPIO_ACTIVE_LOW>;
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dsi-lanes = <4>;
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video-mode = <2>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dsi_to_lcdif: endpoint {
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remote-endpoint = <&lcdif_to_dsi>;
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};
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};
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port@1 {
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reg = <1>;
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dsi_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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