66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2022-2023 NVIDIA CORPORATION. All rights reserved.
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*/
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#ifndef LINUX_TEGRA_ICC_H
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#define LINUX_TEGRA_ICC_H
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enum tegra_icc_client_type {
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TEGRA_ICC_NONE,
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TEGRA_ICC_NISO,
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TEGRA_ICC_ISO_DISPLAY,
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TEGRA_ICC_ISO_VI,
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TEGRA_ICC_ISO_AUDIO,
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TEGRA_ICC_ISO_VIFAL,
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};
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/* ICC ID's for MC client's used in BPMP */
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#define TEGRA_ICC_BPMP_DEBUG 1
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#define TEGRA_ICC_BPMP_CPU_CLUSTER0 2
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#define TEGRA_ICC_BPMP_CPU_CLUSTER1 3
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#define TEGRA_ICC_BPMP_CPU_CLUSTER2 4
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#define TEGRA_ICC_BPMP_GPU 5
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#define TEGRA_ICC_BPMP_CACTMON 6
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#define TEGRA_ICC_BPMP_DISPLAY 7
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#define TEGRA_ICC_BPMP_VI 8
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#define TEGRA_ICC_BPMP_EQOS 9
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#define TEGRA_ICC_BPMP_PCIE_0 10
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#define TEGRA_ICC_BPMP_PCIE_1 11
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#define TEGRA_ICC_BPMP_PCIE_2 12
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#define TEGRA_ICC_BPMP_PCIE_3 13
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#define TEGRA_ICC_BPMP_PCIE_4 14
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#define TEGRA_ICC_BPMP_PCIE_5 15
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#define TEGRA_ICC_BPMP_PCIE_6 16
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#define TEGRA_ICC_BPMP_PCIE_7 17
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#define TEGRA_ICC_BPMP_PCIE_8 18
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#define TEGRA_ICC_BPMP_PCIE_9 19
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#define TEGRA_ICC_BPMP_PCIE_10 20
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#define TEGRA_ICC_BPMP_DLA_0 21
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#define TEGRA_ICC_BPMP_DLA_1 22
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#define TEGRA_ICC_BPMP_SDMMC_1 23
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#define TEGRA_ICC_BPMP_SDMMC_2 24
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#define TEGRA_ICC_BPMP_SDMMC_3 25
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#define TEGRA_ICC_BPMP_SDMMC_4 26
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#define TEGRA_ICC_BPMP_NVDEC 27
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#define TEGRA_ICC_BPMP_NVENC 28
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#define TEGRA_ICC_BPMP_NVJPG_0 29
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#define TEGRA_ICC_BPMP_NVJPG_1 30
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#define TEGRA_ICC_BPMP_OFAA 31
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#define TEGRA_ICC_BPMP_XUSB_HOST 32
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#define TEGRA_ICC_BPMP_XUSB_DEV 33
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#define TEGRA_ICC_BPMP_TSEC 34
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#define TEGRA_ICC_BPMP_VIC 35
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#define TEGRA_ICC_BPMP_APE 36
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#define TEGRA_ICC_BPMP_APEDMA 37
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#define TEGRA_ICC_BPMP_SE 38
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#define TEGRA_ICC_BPMP_ISP 39
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#define TEGRA_ICC_BPMP_HDA 40
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#define TEGRA_ICC_BPMP_VIFAL 41
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#define TEGRA_ICC_BPMP_VI2FAL 42
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#define TEGRA_ICC_BPMP_VI2 43
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#define TEGRA_ICC_BPMP_RCE 44
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#define TEGRA_ICC_BPMP_PVA 45
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#endif /* LINUX_TEGRA_ICC_H */
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