96 lines
3.4 KiB
C
96 lines
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef __DRIVERS_INTERCONNECT_QCOM_QDU1000_H
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#define __DRIVERS_INTERCONNECT_QCOM_QDU1000_H
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#define QDU1000_MASTER_SYS_TCU 0
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#define QDU1000_MASTER_APPSS_PROC 1
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#define QDU1000_MASTER_LLCC 2
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#define QDU1000_MASTER_GIC_AHB 3
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#define QDU1000_MASTER_QDSS_BAM 4
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#define QDU1000_MASTER_QPIC 5
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#define QDU1000_MASTER_QSPI_0 6
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#define QDU1000_MASTER_QUP_0 7
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#define QDU1000_MASTER_QUP_1 8
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#define QDU1000_MASTER_SNOC_CFG 9
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#define QDU1000_MASTER_ANOC_SNOC 10
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#define QDU1000_MASTER_ANOC_GSI 11
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#define QDU1000_MASTER_GEMNOC_ECPRI_DMA 12
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#define QDU1000_MASTER_FEC_2_GEMNOC 13
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#define QDU1000_MASTER_GEM_NOC_CNOC 14
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#define QDU1000_MASTER_GEMNOC_MODEM_CNOC 15
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#define QDU1000_MASTER_GEM_NOC_PCIE_SNOC 16
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#define QDU1000_MASTER_ANOC_PCIE_GEM_NOC 17
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#define QDU1000_MASTER_SNOC_GC_MEM_NOC 18
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#define QDU1000_MASTER_SNOC_SF_MEM_NOC 19
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#define QDU1000_MASTER_QUP_CORE_0 20
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#define QDU1000_MASTER_QUP_CORE_1 21
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#define QDU1000_MASTER_CRYPTO 22
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#define QDU1000_MASTER_ECPRI_GSI 23
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#define QDU1000_MASTER_MSS_PROC 24
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#define QDU1000_MASTER_PIMEM 25
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#define QDU1000_MASTER_SNOC_ECPRI_DMA 26
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#define QDU1000_MASTER_GIC 27
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#define QDU1000_MASTER_PCIE 28
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#define QDU1000_MASTER_QDSS_ETR 29
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#define QDU1000_MASTER_QDSS_ETR_1 30
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#define QDU1000_MASTER_SDCC_1 31
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#define QDU1000_MASTER_USB3 32
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#define QDU1000_SLAVE_EBI1 512
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#define QDU1000_SLAVE_AHB2PHY_SOUTH 513
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#define QDU1000_SLAVE_AHB2PHY_NORTH 514
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#define QDU1000_SLAVE_AHB2PHY_EAST 515
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#define QDU1000_SLAVE_AOSS 516
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#define QDU1000_SLAVE_CLK_CTL 517
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#define QDU1000_SLAVE_RBCPR_CX_CFG 518
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#define QDU1000_SLAVE_RBCPR_MX_CFG 519
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#define QDU1000_SLAVE_CRYPTO_0_CFG 520
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#define QDU1000_SLAVE_ECPRI_CFG 521
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#define QDU1000_SLAVE_IMEM_CFG 522
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#define QDU1000_SLAVE_IPC_ROUTER_CFG 523
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#define QDU1000_SLAVE_CNOC_MSS 524
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#define QDU1000_SLAVE_PCIE_CFG 525
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#define QDU1000_SLAVE_PDM 526
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#define QDU1000_SLAVE_PIMEM_CFG 527
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#define QDU1000_SLAVE_PRNG 528
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#define QDU1000_SLAVE_QDSS_CFG 529
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#define QDU1000_SLAVE_QPIC 530
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#define QDU1000_SLAVE_QSPI_0 531
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#define QDU1000_SLAVE_QUP_0 532
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#define QDU1000_SLAVE_QUP_1 533
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#define QDU1000_SLAVE_SDCC_2 534
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#define QDU1000_SLAVE_SMBUS_CFG 535
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#define QDU1000_SLAVE_SNOC_CFG 536
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#define QDU1000_SLAVE_TCSR 537
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#define QDU1000_SLAVE_TLMM 538
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#define QDU1000_SLAVE_TME_CFG 539
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#define QDU1000_SLAVE_TSC_CFG 540
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#define QDU1000_SLAVE_USB3_0 541
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#define QDU1000_SLAVE_VSENSE_CTRL_CFG 542
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#define QDU1000_SLAVE_A1NOC_SNOC 543
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#define QDU1000_SLAVE_ANOC_SNOC_GSI 544
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#define QDU1000_SLAVE_DDRSS_CFG 545
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#define QDU1000_SLAVE_ECPRI_GEMNOC 546
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#define QDU1000_SLAVE_GEM_NOC_CNOC 547
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#define QDU1000_SLAVE_SNOC_GEM_NOC_GC 548
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#define QDU1000_SLAVE_SNOC_GEM_NOC_SF 549
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#define QDU1000_SLAVE_LLCC 550
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#define QDU1000_SLAVE_MODEM_OFFLINE 551
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#define QDU1000_SLAVE_GEMNOC_MODEM_CNOC 552
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#define QDU1000_SLAVE_MEM_NOC_PCIE_SNOC 553
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#define QDU1000_SLAVE_ANOC_PCIE_GEM_NOC 554
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#define QDU1000_SLAVE_QUP_CORE_0 555
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#define QDU1000_SLAVE_QUP_CORE_1 556
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#define QDU1000_SLAVE_IMEM 557
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#define QDU1000_SLAVE_PIMEM 558
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#define QDU1000_SLAVE_SERVICE_SNOC 559
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#define QDU1000_SLAVE_ETHERNET_SS 560
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#define QDU1000_SLAVE_PCIE_0 561
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#define QDU1000_SLAVE_QDSS_STM 562
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#define QDU1000_SLAVE_TCU 563
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#endif
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