729 lines
16 KiB
C
729 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/dma-mapping.h>
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#include <linux/init.h>
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#include <linux/export.h>
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#include <linux/mod_devicetable.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/irq.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <asm/spitfire.h>
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#include "of_device_common.h"
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void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name)
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{
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unsigned long ret = res->start + offset;
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struct resource *r;
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if (res->flags & IORESOURCE_MEM)
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r = request_mem_region(ret, size, name);
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else
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r = request_region(ret, size, name);
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if (!r)
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ret = 0;
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return (void __iomem *) ret;
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}
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EXPORT_SYMBOL(of_ioremap);
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void of_iounmap(struct resource *res, void __iomem *base, unsigned long size)
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{
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if (res->flags & IORESOURCE_MEM)
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release_mem_region((unsigned long) base, size);
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else
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release_region((unsigned long) base, size);
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}
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EXPORT_SYMBOL(of_iounmap);
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/*
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* PCI bus specific translator
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*/
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static int of_bus_pci_match(struct device_node *np)
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{
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if (of_node_name_eq(np, "pci")) {
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const char *model = of_get_property(np, "model", NULL);
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if (model && !strcmp(model, "SUNW,simba"))
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return 0;
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/* Do not do PCI specific frobbing if the
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* PCI bridge lacks a ranges property. We
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* want to pass it through up to the next
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* parent as-is, not with the PCI translate
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* method which chops off the top address cell.
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*/
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if (!of_property_present(np, "ranges"))
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return 0;
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return 1;
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}
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return 0;
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}
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static int of_bus_simba_match(struct device_node *np)
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{
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const char *model = of_get_property(np, "model", NULL);
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if (model && !strcmp(model, "SUNW,simba"))
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return 1;
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/* Treat PCI busses lacking ranges property just like
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* simba.
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*/
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if (of_node_name_eq(np, "pci")) {
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if (!of_property_present(np, "ranges"))
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return 1;
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}
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return 0;
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}
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static int of_bus_simba_map(u32 *addr, const u32 *range,
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int na, int ns, int pna)
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{
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return 0;
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}
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static void of_bus_pci_count_cells(struct device_node *np,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 3;
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if (sizec)
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*sizec = 2;
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}
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static int of_bus_pci_map(u32 *addr, const u32 *range,
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int na, int ns, int pna)
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{
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u32 result[OF_MAX_ADDR_CELLS];
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int i;
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/* Check address type match */
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if (!((addr[0] ^ range[0]) & 0x03000000))
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goto type_match;
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/* Special exception, we can map a 64-bit address into
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* a 32-bit range.
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*/
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if ((addr[0] & 0x03000000) == 0x03000000 &&
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(range[0] & 0x03000000) == 0x02000000)
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goto type_match;
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return -EINVAL;
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type_match:
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if (of_out_of_range(addr + 1, range + 1, range + na + pna,
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na - 1, ns))
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return -EINVAL;
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/* Start with the parent range base. */
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memcpy(result, range + na, pna * 4);
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/* Add in the child address offset, skipping high cell. */
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for (i = 0; i < na - 1; i++)
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result[pna - 1 - i] +=
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(addr[na - 1 - i] -
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range[na - 1 - i]);
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memcpy(addr, result, pna * 4);
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return 0;
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}
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static unsigned long of_bus_pci_get_flags(const u32 *addr, unsigned long flags)
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{
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u32 w = addr[0];
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/* For PCI, we override whatever child busses may have used. */
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flags = 0;
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switch((w >> 24) & 0x03) {
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case 0x01:
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flags |= IORESOURCE_IO;
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break;
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case 0x02: /* 32 bits */
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case 0x03: /* 64 bits */
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flags |= IORESOURCE_MEM;
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break;
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}
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if (w & 0x40000000)
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flags |= IORESOURCE_PREFETCH;
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return flags;
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}
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/*
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* FHC/Central bus specific translator.
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*
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* This is just needed to hard-code the address and size cell
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* counts. 'fhc' and 'central' nodes lack the #address-cells and
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* #size-cells properties, and if you walk to the root on such
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* Enterprise boxes all you'll get is a #size-cells of 2 which is
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* not what we want to use.
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*/
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static int of_bus_fhc_match(struct device_node *np)
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{
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return of_node_name_eq(np, "fhc") ||
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of_node_name_eq(np, "central");
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}
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#define of_bus_fhc_count_cells of_bus_sbus_count_cells
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/*
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* Array of bus specific translators
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*/
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static struct of_bus of_busses[] = {
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/* PCI */
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{
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.name = "pci",
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.addr_prop_name = "assigned-addresses",
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.match = of_bus_pci_match,
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.count_cells = of_bus_pci_count_cells,
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.map = of_bus_pci_map,
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.get_flags = of_bus_pci_get_flags,
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},
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/* SIMBA */
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{
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.name = "simba",
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.addr_prop_name = "assigned-addresses",
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.match = of_bus_simba_match,
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.count_cells = of_bus_pci_count_cells,
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.map = of_bus_simba_map,
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.get_flags = of_bus_pci_get_flags,
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},
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/* SBUS */
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{
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.name = "sbus",
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.addr_prop_name = "reg",
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.match = of_bus_sbus_match,
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.count_cells = of_bus_sbus_count_cells,
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.map = of_bus_default_map,
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.get_flags = of_bus_default_get_flags,
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},
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/* FHC */
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{
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.name = "fhc",
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.addr_prop_name = "reg",
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.match = of_bus_fhc_match,
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.count_cells = of_bus_fhc_count_cells,
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.map = of_bus_default_map,
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.get_flags = of_bus_default_get_flags,
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},
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/* Default */
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{
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.name = "default",
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.addr_prop_name = "reg",
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.match = NULL,
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.count_cells = of_bus_default_count_cells,
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.map = of_bus_default_map,
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.get_flags = of_bus_default_get_flags,
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},
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};
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static struct of_bus *of_match_bus(struct device_node *np)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
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if (!of_busses[i].match || of_busses[i].match(np))
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return &of_busses[i];
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BUG();
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return NULL;
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}
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static int __init build_one_resource(struct device_node *parent,
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struct of_bus *bus,
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struct of_bus *pbus,
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u32 *addr,
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int na, int ns, int pna)
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{
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const u32 *ranges;
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int rone, rlen;
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ranges = of_get_property(parent, "ranges", &rlen);
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if (ranges == NULL || rlen == 0) {
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u32 result[OF_MAX_ADDR_CELLS];
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int i;
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memset(result, 0, pna * 4);
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for (i = 0; i < na; i++)
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result[pna - 1 - i] =
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addr[na - 1 - i];
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memcpy(addr, result, pna * 4);
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return 0;
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}
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/* Now walk through the ranges */
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rlen /= 4;
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rone = na + pna + ns;
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for (; rlen >= rone; rlen -= rone, ranges += rone) {
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if (!bus->map(addr, ranges, na, ns, pna))
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return 0;
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}
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/* When we miss an I/O space match on PCI, just pass it up
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* to the next PCI bridge and/or controller.
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*/
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if (!strcmp(bus->name, "pci") &&
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(addr[0] & 0x03000000) == 0x01000000)
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return 0;
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return 1;
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}
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static int __init use_1to1_mapping(struct device_node *pp)
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{
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/* If we have a ranges property in the parent, use it. */
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if (of_property_present(pp, "ranges"))
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return 0;
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/* If the parent is the dma node of an ISA bus, pass
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* the translation up to the root.
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*
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* Some SBUS devices use intermediate nodes to express
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* hierarchy within the device itself. These aren't
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* real bus nodes, and don't have a 'ranges' property.
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* But, we should still pass the translation work up
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* to the SBUS itself.
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*/
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if (of_node_name_eq(pp, "dma") ||
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of_node_name_eq(pp, "espdma") ||
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of_node_name_eq(pp, "ledma") ||
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of_node_name_eq(pp, "lebuffer"))
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return 0;
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/* Similarly for all PCI bridges, if we get this far
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* it lacks a ranges property, and this will include
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* cases like Simba.
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*/
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if (of_node_name_eq(pp, "pci"))
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return 0;
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return 1;
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}
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static int of_resource_verbose;
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static void __init build_device_resources(struct platform_device *op,
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struct device *parent)
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{
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struct platform_device *p_op;
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struct of_bus *bus;
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int na, ns;
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int index, num_reg;
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const void *preg;
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if (!parent)
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return;
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p_op = to_platform_device(parent);
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bus = of_match_bus(p_op->dev.of_node);
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bus->count_cells(op->dev.of_node, &na, &ns);
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preg = of_get_property(op->dev.of_node, bus->addr_prop_name, &num_reg);
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if (!preg || num_reg == 0)
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return;
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/* Convert to num-cells. */
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num_reg /= 4;
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/* Convert to num-entries. */
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num_reg /= na + ns;
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/* Prevent overrunning the op->resources[] array. */
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if (num_reg > PROMREG_MAX) {
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printk(KERN_WARNING "%pOF: Too many regs (%d), "
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"limiting to %d.\n",
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op->dev.of_node, num_reg, PROMREG_MAX);
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num_reg = PROMREG_MAX;
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}
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op->resource = op->archdata.resource;
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op->num_resources = num_reg;
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for (index = 0; index < num_reg; index++) {
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struct resource *r = &op->resource[index];
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u32 addr[OF_MAX_ADDR_CELLS];
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const u32 *reg = (preg + (index * ((na + ns) * 4)));
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struct device_node *dp = op->dev.of_node;
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struct device_node *pp = p_op->dev.of_node;
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struct of_bus *pbus, *dbus;
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u64 size, result = OF_BAD_ADDR;
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unsigned long flags;
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int dna, dns;
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int pna, pns;
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size = of_read_addr(reg + na, ns);
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memcpy(addr, reg, na * 4);
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flags = bus->get_flags(addr, 0);
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if (use_1to1_mapping(pp)) {
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result = of_read_addr(addr, na);
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goto build_res;
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}
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dna = na;
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dns = ns;
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dbus = bus;
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while (1) {
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dp = pp;
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pp = dp->parent;
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if (!pp) {
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result = of_read_addr(addr, dna);
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break;
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}
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pbus = of_match_bus(pp);
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pbus->count_cells(dp, &pna, &pns);
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if (build_one_resource(dp, dbus, pbus, addr,
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dna, dns, pna))
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break;
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flags = pbus->get_flags(addr, flags);
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dna = pna;
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dns = pns;
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dbus = pbus;
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}
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build_res:
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memset(r, 0, sizeof(*r));
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if (of_resource_verbose)
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printk("%pOF reg[%d] -> %llx\n",
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op->dev.of_node, index,
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result);
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if (result != OF_BAD_ADDR) {
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if (tlb_type == hypervisor)
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result &= 0x0fffffffffffffffUL;
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r->start = result;
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r->end = result + size - 1;
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r->flags = flags;
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}
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r->name = op->dev.of_node->full_name;
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}
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}
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static struct device_node * __init
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apply_interrupt_map(struct device_node *dp, struct device_node *pp,
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const u32 *imap, int imlen, const u32 *imask,
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unsigned int *irq_p)
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{
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struct device_node *cp;
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unsigned int irq = *irq_p;
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struct of_bus *bus;
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phandle handle;
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const u32 *reg;
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int na, num_reg, i;
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bus = of_match_bus(pp);
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bus->count_cells(dp, &na, NULL);
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reg = of_get_property(dp, "reg", &num_reg);
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if (!reg || !num_reg)
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return NULL;
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imlen /= ((na + 3) * 4);
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handle = 0;
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for (i = 0; i < imlen; i++) {
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int j;
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for (j = 0; j < na; j++) {
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if ((reg[j] & imask[j]) != imap[j])
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goto next;
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}
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if (imap[na] == irq) {
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handle = imap[na + 1];
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irq = imap[na + 2];
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break;
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}
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next:
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imap += (na + 3);
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}
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if (i == imlen) {
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/* Psycho and Sabre PCI controllers can have 'interrupt-map'
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* properties that do not include the on-board device
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* interrupts. Instead, the device's 'interrupts' property
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* is already a fully specified INO value.
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*
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* Handle this by deciding that, if we didn't get a
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* match in the parent's 'interrupt-map', and the
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* parent is an IRQ translator, then use the parent as
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* our IRQ controller.
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*/
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if (pp->irq_trans)
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return pp;
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return NULL;
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}
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*irq_p = irq;
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cp = of_find_node_by_phandle(handle);
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return cp;
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}
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static unsigned int __init pci_irq_swizzle(struct device_node *dp,
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struct device_node *pp,
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unsigned int irq)
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{
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const struct linux_prom_pci_registers *regs;
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unsigned int bus, devfn, slot, ret;
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if (irq < 1 || irq > 4)
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return irq;
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regs = of_get_property(dp, "reg", NULL);
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if (!regs)
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return irq;
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bus = (regs->phys_hi >> 16) & 0xff;
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devfn = (regs->phys_hi >> 8) & 0xff;
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slot = (devfn >> 3) & 0x1f;
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if (pp->irq_trans) {
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/* Derived from Table 8-3, U2P User's Manual. This branch
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* is handling a PCI controller that lacks a proper set of
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* interrupt-map and interrupt-map-mask properties. The
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* Ultra-E450 is one example.
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*
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* The bit layout is BSSLL, where:
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* B: 0 on bus A, 1 on bus B
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* D: 2-bit slot number, derived from PCI device number as
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* (dev - 1) for bus A, or (dev - 2) for bus B
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* L: 2-bit line number
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*/
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if (bus & 0x80) {
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/* PBM-A */
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bus = 0x00;
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slot = (slot - 1) << 2;
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} else {
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/* PBM-B */
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bus = 0x10;
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slot = (slot - 2) << 2;
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}
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irq -= 1;
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ret = (bus | slot | irq);
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} else {
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/* Going through a PCI-PCI bridge that lacks a set of
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* interrupt-map and interrupt-map-mask properties.
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*/
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ret = ((irq - 1 + (slot & 3)) & 3) + 1;
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}
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return ret;
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}
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static int of_irq_verbose;
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static unsigned int __init build_one_device_irq(struct platform_device *op,
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struct device *parent,
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unsigned int irq)
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{
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struct device_node *dp = op->dev.of_node;
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struct device_node *pp, *ip;
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unsigned int orig_irq = irq;
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int nid;
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if (irq == 0xffffffff)
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return irq;
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if (dp->irq_trans) {
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irq = dp->irq_trans->irq_build(dp, irq,
|
|
dp->irq_trans->data);
|
|
|
|
if (of_irq_verbose)
|
|
printk("%pOF: direct translate %x --> %x\n",
|
|
dp, orig_irq, irq);
|
|
|
|
goto out;
|
|
}
|
|
|
|
/* Something more complicated. Walk up to the root, applying
|
|
* interrupt-map or bus specific translations, until we hit
|
|
* an IRQ translator.
|
|
*
|
|
* If we hit a bus type or situation we cannot handle, we
|
|
* stop and assume that the original IRQ number was in a
|
|
* format which has special meaning to it's immediate parent.
|
|
*/
|
|
pp = dp->parent;
|
|
ip = NULL;
|
|
while (pp) {
|
|
const void *imap, *imsk;
|
|
int imlen;
|
|
|
|
imap = of_get_property(pp, "interrupt-map", &imlen);
|
|
imsk = of_get_property(pp, "interrupt-map-mask", NULL);
|
|
if (imap && imsk) {
|
|
struct device_node *iret;
|
|
int this_orig_irq = irq;
|
|
|
|
iret = apply_interrupt_map(dp, pp,
|
|
imap, imlen, imsk,
|
|
&irq);
|
|
|
|
if (of_irq_verbose)
|
|
printk("%pOF: Apply [%pOF:%x] imap --> [%pOF:%x]\n",
|
|
op->dev.of_node,
|
|
pp, this_orig_irq, iret, irq);
|
|
|
|
if (!iret)
|
|
break;
|
|
|
|
if (iret->irq_trans) {
|
|
ip = iret;
|
|
break;
|
|
}
|
|
} else {
|
|
if (of_node_name_eq(pp, "pci")) {
|
|
unsigned int this_orig_irq = irq;
|
|
|
|
irq = pci_irq_swizzle(dp, pp, irq);
|
|
if (of_irq_verbose)
|
|
printk("%pOF: PCI swizzle [%pOF] "
|
|
"%x --> %x\n",
|
|
op->dev.of_node,
|
|
pp, this_orig_irq,
|
|
irq);
|
|
|
|
}
|
|
|
|
if (pp->irq_trans) {
|
|
ip = pp;
|
|
break;
|
|
}
|
|
}
|
|
dp = pp;
|
|
pp = pp->parent;
|
|
}
|
|
if (!ip)
|
|
return orig_irq;
|
|
|
|
irq = ip->irq_trans->irq_build(op->dev.of_node, irq,
|
|
ip->irq_trans->data);
|
|
if (of_irq_verbose)
|
|
printk("%pOF: Apply IRQ trans [%pOF] %x --> %x\n",
|
|
op->dev.of_node, ip, orig_irq, irq);
|
|
|
|
out:
|
|
nid = of_node_to_nid(dp);
|
|
if (nid != -1) {
|
|
cpumask_t numa_mask;
|
|
|
|
cpumask_copy(&numa_mask, cpumask_of_node(nid));
|
|
irq_set_affinity(irq, &numa_mask);
|
|
}
|
|
|
|
return irq;
|
|
}
|
|
|
|
static struct platform_device * __init scan_one_device(struct device_node *dp,
|
|
struct device *parent)
|
|
{
|
|
struct platform_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
|
|
const unsigned int *irq;
|
|
struct dev_archdata *sd;
|
|
int len, i;
|
|
|
|
if (!op)
|
|
return NULL;
|
|
|
|
sd = &op->dev.archdata;
|
|
sd->op = op;
|
|
|
|
op->dev.of_node = dp;
|
|
|
|
irq = of_get_property(dp, "interrupts", &len);
|
|
if (irq) {
|
|
op->archdata.num_irqs = len / 4;
|
|
|
|
/* Prevent overrunning the op->irqs[] array. */
|
|
if (op->archdata.num_irqs > PROMINTR_MAX) {
|
|
printk(KERN_WARNING "%pOF: Too many irqs (%d), "
|
|
"limiting to %d.\n",
|
|
dp, op->archdata.num_irqs, PROMINTR_MAX);
|
|
op->archdata.num_irqs = PROMINTR_MAX;
|
|
}
|
|
memcpy(op->archdata.irqs, irq, op->archdata.num_irqs * 4);
|
|
} else {
|
|
op->archdata.num_irqs = 0;
|
|
}
|
|
|
|
build_device_resources(op, parent);
|
|
for (i = 0; i < op->archdata.num_irqs; i++)
|
|
op->archdata.irqs[i] = build_one_device_irq(op, parent, op->archdata.irqs[i]);
|
|
|
|
op->dev.parent = parent;
|
|
op->dev.bus = &platform_bus_type;
|
|
if (!parent)
|
|
dev_set_name(&op->dev, "root");
|
|
else
|
|
dev_set_name(&op->dev, "%08x", dp->phandle);
|
|
op->dev.coherent_dma_mask = DMA_BIT_MASK(32);
|
|
op->dev.dma_mask = &op->dev.coherent_dma_mask;
|
|
|
|
if (of_device_register(op)) {
|
|
printk("%pOF: Could not register of device.\n", dp);
|
|
kfree(op);
|
|
op = NULL;
|
|
}
|
|
|
|
return op;
|
|
}
|
|
|
|
static void __init scan_tree(struct device_node *dp, struct device *parent)
|
|
{
|
|
while (dp) {
|
|
struct platform_device *op = scan_one_device(dp, parent);
|
|
|
|
if (op)
|
|
scan_tree(dp->child, &op->dev);
|
|
|
|
dp = dp->sibling;
|
|
}
|
|
}
|
|
|
|
static int __init scan_of_devices(void)
|
|
{
|
|
struct device_node *root = of_find_node_by_path("/");
|
|
struct platform_device *parent;
|
|
|
|
parent = scan_one_device(root, NULL);
|
|
if (!parent)
|
|
return 0;
|
|
|
|
scan_tree(root->child, &parent->dev);
|
|
return 0;
|
|
}
|
|
postcore_initcall(scan_of_devices);
|
|
|
|
static int __init of_debug(char *str)
|
|
{
|
|
int val = 0;
|
|
|
|
get_option(&str, &val);
|
|
if (val & 1)
|
|
of_resource_verbose = 1;
|
|
if (val & 2)
|
|
of_irq_verbose = 1;
|
|
return 1;
|
|
}
|
|
|
|
__setup("of_debug=", of_debug);
|