136 lines
3.4 KiB
C
136 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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* Copyright (c) 2022 Ventana Micro Systems Inc.
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*/
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#define pr_fmt(fmt) "suspend: " fmt
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#include <linux/ftrace.h>
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#include <linux/suspend.h>
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#include <asm/csr.h>
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#include <asm/sbi.h>
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#include <asm/suspend.h>
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void suspend_save_csrs(struct suspend_context *context)
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{
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context->scratch = csr_read(CSR_SCRATCH);
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if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_XLINUXENVCFG))
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context->envcfg = csr_read(CSR_ENVCFG);
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context->tvec = csr_read(CSR_TVEC);
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context->ie = csr_read(CSR_IE);
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/*
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* No need to save/restore IP CSR (i.e. MIP or SIP) because:
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*
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* 1. For no-MMU (M-mode) kernel, the bits in MIP are set by
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* external devices (such as interrupt controller, timer, etc).
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* 2. For MMU (S-mode) kernel, the bits in SIP are set by
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* M-mode firmware and external devices (such as interrupt
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* controller, etc).
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*/
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#ifdef CONFIG_MMU
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context->satp = csr_read(CSR_SATP);
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#endif
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}
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void suspend_restore_csrs(struct suspend_context *context)
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{
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csr_write(CSR_SCRATCH, context->scratch);
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if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_XLINUXENVCFG))
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csr_write(CSR_ENVCFG, context->envcfg);
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csr_write(CSR_TVEC, context->tvec);
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csr_write(CSR_IE, context->ie);
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#ifdef CONFIG_MMU
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csr_write(CSR_SATP, context->satp);
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#endif
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}
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int cpu_suspend(unsigned long arg,
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int (*finish)(unsigned long arg,
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unsigned long entry,
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unsigned long context))
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{
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int rc = 0;
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struct suspend_context context = { 0 };
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/* Finisher should be non-NULL */
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if (!finish)
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return -EINVAL;
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/* Save additional CSRs*/
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suspend_save_csrs(&context);
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/*
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* Function graph tracer state gets incosistent when the kernel
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* calls functions that never return (aka finishers) hence disable
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* graph tracing during their execution.
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*/
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pause_graph_tracing();
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/* Save context on stack */
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if (__cpu_suspend_enter(&context)) {
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/* Call the finisher */
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rc = finish(arg, __pa_symbol(__cpu_resume_enter),
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(ulong)&context);
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/*
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* Should never reach here, unless the suspend finisher
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* fails. Successful cpu_suspend() should return from
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* __cpu_resume_entry()
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*/
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if (!rc)
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rc = -EOPNOTSUPP;
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}
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/* Enable function graph tracer */
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unpause_graph_tracing();
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/* Restore additional CSRs */
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suspend_restore_csrs(&context);
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return rc;
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}
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#ifdef CONFIG_RISCV_SBI
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static int sbi_system_suspend(unsigned long sleep_type,
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unsigned long resume_addr,
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unsigned long opaque)
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{
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struct sbiret ret;
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ret = sbi_ecall(SBI_EXT_SUSP, SBI_EXT_SUSP_SYSTEM_SUSPEND,
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sleep_type, resume_addr, opaque, 0, 0, 0);
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if (ret.error)
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return sbi_err_map_linux_errno(ret.error);
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return ret.value;
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}
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static int sbi_system_suspend_enter(suspend_state_t state)
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{
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return cpu_suspend(SBI_SUSP_SLEEP_TYPE_SUSPEND_TO_RAM, sbi_system_suspend);
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}
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static const struct platform_suspend_ops sbi_system_suspend_ops = {
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.valid = suspend_valid_only_mem,
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.enter = sbi_system_suspend_enter,
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};
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static int __init sbi_system_suspend_init(void)
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{
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if (sbi_spec_version >= sbi_mk_version(2, 0) &&
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sbi_probe_extension(SBI_EXT_SUSP) > 0) {
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pr_info("SBI SUSP extension detected\n");
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if (IS_ENABLED(CONFIG_SUSPEND))
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suspend_set_ops(&sbi_system_suspend_ops);
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}
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return 0;
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}
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arch_initcall(sbi_system_suspend_init);
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#endif /* CONFIG_RISCV_SBI */
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