286 lines
8.0 KiB
C
286 lines
8.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/* ppc-dis.c -- Disassemble PowerPC instructions
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Copyright (C) 1994-2016 Free Software Foundation, Inc.
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Written by Ian Lance Taylor, Cygnus Support
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This file is part of GDB, GAS, and the GNU binutils.
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*/
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#include <asm/cputable.h>
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#include <asm/cpu_has_feature.h>
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#include "nonstdio.h"
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#include "ansidecl.h"
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#include "ppc.h"
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#include "dis-asm.h"
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/* This file provides several disassembler functions, all of which use
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the disassembler interface defined in dis-asm.h. Several functions
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are provided because this file handles disassembly for the PowerPC
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in both big and little endian mode and also for the POWER (RS/6000)
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chip. */
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/* Extract the operand value from the PowerPC or POWER instruction. */
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static long
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operand_value_powerpc (const struct powerpc_operand *operand,
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unsigned long insn, ppc_cpu_t dialect)
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{
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long value;
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int invalid;
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/* Extract the value from the instruction. */
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if (operand->extract)
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value = (*operand->extract) (insn, dialect, &invalid);
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else
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{
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if (operand->shift >= 0)
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value = (insn >> operand->shift) & operand->bitm;
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else
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value = (insn << -operand->shift) & operand->bitm;
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if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
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{
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/* BITM is always some number of zeros followed by some
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number of ones, followed by some number of zeros. */
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unsigned long top = operand->bitm;
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/* top & -top gives the rightmost 1 bit, so this
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fills in any trailing zeros. */
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top |= (top & -top) - 1;
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top &= ~(top >> 1);
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value = (value ^ top) - top;
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}
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}
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return value;
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}
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/* Determine whether the optional operand(s) should be printed. */
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static int
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skip_optional_operands (const unsigned char *opindex,
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unsigned long insn, ppc_cpu_t dialect)
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{
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const struct powerpc_operand *operand;
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for (; *opindex != 0; opindex++)
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{
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operand = &powerpc_operands[*opindex];
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if ((operand->flags & PPC_OPERAND_NEXT) != 0
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|| ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
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&& operand_value_powerpc (operand, insn, dialect) !=
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ppc_optional_operand_value (operand)))
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return 0;
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}
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return 1;
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}
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/* Find a match for INSN in the opcode table, given machine DIALECT.
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A DIALECT of -1 is special, matching all machine opcode variations. */
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static const struct powerpc_opcode *
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lookup_powerpc (unsigned long insn, ppc_cpu_t dialect)
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{
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const struct powerpc_opcode *opcode;
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const struct powerpc_opcode *opcode_end;
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opcode_end = powerpc_opcodes + powerpc_num_opcodes;
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/* Find the first match in the opcode table for this major opcode. */
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for (opcode = powerpc_opcodes; opcode < opcode_end; ++opcode)
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{
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const unsigned char *opindex;
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const struct powerpc_operand *operand;
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int invalid;
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if ((insn & opcode->mask) != opcode->opcode
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|| (dialect != (ppc_cpu_t) -1
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&& ((opcode->flags & dialect) == 0
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|| (opcode->deprecated & dialect) != 0)))
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continue;
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/* Check validity of operands. */
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invalid = 0;
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for (opindex = opcode->operands; *opindex != 0; opindex++)
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{
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operand = powerpc_operands + *opindex;
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if (operand->extract)
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(*operand->extract) (insn, dialect, &invalid);
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}
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if (invalid)
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continue;
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return opcode;
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}
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return NULL;
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}
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/* Print a PowerPC or POWER instruction. */
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int print_insn_powerpc (unsigned long insn, unsigned long memaddr)
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{
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const struct powerpc_opcode *opcode;
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bool insn_is_short;
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ppc_cpu_t dialect;
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dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON
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| PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_ALTIVEC;
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if (cpu_has_feature(CPU_FTRS_POWER5))
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dialect |= PPC_OPCODE_POWER5;
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if (cpu_has_feature(CPU_FTRS_CELL))
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dialect |= (PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC);
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if (cpu_has_feature(CPU_FTRS_POWER6))
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dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC);
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if (cpu_has_feature(CPU_FTRS_POWER7))
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dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
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| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX);
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if (cpu_has_feature(CPU_FTRS_POWER8))
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dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
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| PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
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| PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX);
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if (cpu_has_feature(CPU_FTRS_POWER9))
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dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
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| PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_HTM
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| PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
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| PPC_OPCODE_VSX | PPC_OPCODE_VSX3);
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/* Get the major opcode of the insn. */
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opcode = NULL;
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insn_is_short = false;
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if (opcode == NULL)
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opcode = lookup_powerpc (insn, dialect);
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if (opcode == NULL && (dialect & PPC_OPCODE_ANY) != 0)
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opcode = lookup_powerpc (insn, (ppc_cpu_t) -1);
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if (opcode != NULL)
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{
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const unsigned char *opindex;
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const struct powerpc_operand *operand;
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int need_comma;
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int need_paren;
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int skip_optional;
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if (opcode->operands[0] != 0)
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printf("%-7s ", opcode->name);
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else
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printf("%s", opcode->name);
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if (insn_is_short)
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/* The operands will be fetched out of the 16-bit instruction. */
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insn >>= 16;
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/* Now extract and print the operands. */
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need_comma = 0;
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need_paren = 0;
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skip_optional = -1;
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for (opindex = opcode->operands; *opindex != 0; opindex++)
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{
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long value;
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operand = powerpc_operands + *opindex;
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/* Operands that are marked FAKE are simply ignored. We
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already made sure that the extract function considered
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the instruction to be valid. */
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if ((operand->flags & PPC_OPERAND_FAKE) != 0)
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continue;
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/* If all of the optional operands have the value zero,
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then don't print any of them. */
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if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
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{
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if (skip_optional < 0)
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skip_optional = skip_optional_operands (opindex, insn,
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dialect);
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if (skip_optional)
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continue;
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}
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value = operand_value_powerpc (operand, insn, dialect);
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if (need_comma)
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{
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printf(",");
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need_comma = 0;
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}
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/* Print the operand as directed by the flags. */
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if ((operand->flags & PPC_OPERAND_GPR) != 0
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|| ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
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printf("r%ld", value);
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else if ((operand->flags & PPC_OPERAND_FPR) != 0)
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printf("f%ld", value);
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else if ((operand->flags & PPC_OPERAND_VR) != 0)
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printf("v%ld", value);
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else if ((operand->flags & PPC_OPERAND_VSR) != 0)
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printf("vs%ld", value);
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else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
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print_address(memaddr + value);
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else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
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print_address(value & 0xffffffff);
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else if ((operand->flags & PPC_OPERAND_FSL) != 0)
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printf("fsl%ld", value);
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else if ((operand->flags & PPC_OPERAND_FCR) != 0)
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printf("fcr%ld", value);
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else if ((operand->flags & PPC_OPERAND_UDI) != 0)
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printf("%ld", value);
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else if ((operand->flags & PPC_OPERAND_CR_REG) != 0
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&& (((dialect & PPC_OPCODE_PPC) != 0)
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|| ((dialect & PPC_OPCODE_VLE) != 0)))
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printf("cr%ld", value);
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else if (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
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&& (((dialect & PPC_OPCODE_PPC) != 0)
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|| ((dialect & PPC_OPCODE_VLE) != 0)))
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{
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static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
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int cr;
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int cc;
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cr = value >> 2;
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if (cr != 0)
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printf("4*cr%d+", cr);
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cc = value & 3;
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printf("%s", cbnames[cc]);
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}
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else
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printf("%d", (int) value);
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if (need_paren)
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{
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printf(")");
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need_paren = 0;
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}
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if ((operand->flags & PPC_OPERAND_PARENS) == 0)
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need_comma = 1;
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else
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{
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printf("(");
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need_paren = 1;
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}
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}
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/* We have found and printed an instruction.
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If it was a short VLE instruction we have more to do. */
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if (insn_is_short)
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{
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memaddr += 2;
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return 2;
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}
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else
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/* Otherwise, return. */
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return 4;
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}
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/* We could not find a match. */
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printf(".long 0x%lx", insn);
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return 4;
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}
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