108 lines
3.1 KiB
YAML
108 lines
3.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2023 Realtek Semiconductor Corporation
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/realtek,usb3phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Realtek DHC SoCs USB 3.0 PHY
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maintainers:
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- Stanley Chang <stanley_chang@realtek.com>
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description: |
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Realtek USB 3.0 PHY support the digital home center (DHC) RTD series SoCs.
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The USB 3.0 PHY driver is designed to support the XHCI controller. The SoCs
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support multiple XHCI controllers. One PHY device node maps to one XHCI
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controller.
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RTD1295/RTD1619 SoCs USB
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The USB architecture includes three XHCI controllers.
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Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
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controllers.
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XHCI controller#0 -- usb2phy -- phy#0
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|- usb3phy -- phy#0
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XHCI controller#1 -- usb2phy -- phy#0
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XHCI controller#2 -- usb2phy -- phy#0
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|- usb3phy -- phy#0
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RTD1319/RTD1619b SoCs USB
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The USB architecture includes three XHCI controllers.
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Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
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XHCI controller#0 -- usb2phy -- phy#0
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XHCI controller#1 -- usb2phy -- phy#0
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XHCI controller#2 -- usb2phy -- phy#0
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|- usb3phy -- phy#0
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RTD1319d SoCs USB
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The USB architecture includes three XHCI controllers.
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Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.
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XHCI controller#0 -- usb2phy -- phy#0
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|- usb3phy -- phy#0
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XHCI controller#1 -- usb2phy -- phy#0
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XHCI controller#2 -- usb2phy -- phy#0
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properties:
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compatible:
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enum:
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- realtek,rtd1295-usb3phy
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- realtek,rtd1319-usb3phy
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- realtek,rtd1319d-usb3phy
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- realtek,rtd1619-usb3phy
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- realtek,rtd1619b-usb3phy
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reg:
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maxItems: 1
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"#phy-cells":
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const: 0
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nvmem-cells:
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maxItems: 1
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description: A phandle to the tx lfps swing trim data provided by
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a nvmem device, if unspecified, default values shall be used.
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nvmem-cell-names:
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items:
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- const: usb_u3_tx_lfps_swing_trim
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realtek,amplitude-control-coarse-tuning:
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description:
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This adjusts the signal amplitude for normal operation and beacon LFPS.
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This value is a parameter for coarse tuning.
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For different boards, if the default value is inappropriate, this
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property can be assigned to adjust.
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 255
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minimum: 0
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maximum: 255
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realtek,amplitude-control-fine-tuning:
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description:
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This adjusts the signal amplitude for normal operation and beacon LFPS.
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This value is used for fine-tuning parameters.
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 65535
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minimum: 0
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maximum: 65535
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required:
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- compatible
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- reg
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- "#phy-cells"
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additionalProperties: false
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examples:
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- |
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usb-phy@13e10 {
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compatible = "realtek,rtd1319d-usb3phy";
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reg = <0x13e10 0x4>;
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#phy-cells = <0>;
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nvmem-cells = <&otp_usb_u3_tx_lfps_swing_trim>;
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nvmem-cell-names = "usb_u3_tx_lfps_swing_trim";
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realtek,amplitude-control-coarse-tuning = <0x77>;
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};
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