202 lines
5.8 KiB
YAML
202 lines
5.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments ICSSG PRUSS Ethernet
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maintainers:
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- Md Danish Anwar <danishanwar@ti.com>
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description:
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Ethernet based on the Programmable Real-Time Unit and Industrial
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Communication Subsystem.
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allOf:
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- $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
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properties:
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compatible:
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enum:
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- ti,am642-icssg-prueth # for AM64x SoC family
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- ti,am654-icssg-prueth # for AM65x SoC family
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sram:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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phandle to MSMC SRAM node
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dmas:
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maxItems: 10
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dma-names:
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items:
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- const: tx0-0
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- const: tx0-1
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- const: tx0-2
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- const: tx0-3
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- const: tx1-0
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- const: tx1-1
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- const: tx1-2
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- const: tx1-3
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- const: rx0
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- const: rx1
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ti,mii-g-rt:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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phandle to MII_G_RT module's syscon regmap.
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ti,mii-rt:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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phandle to MII_RT module's syscon regmap
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ti,iep:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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maxItems: 2
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items:
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maxItems: 1
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description:
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phandle to IEP (Industrial Ethernet Peripheral) for ICSSG
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interrupts:
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maxItems: 2
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description:
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Interrupt specifiers to TX timestamp IRQ.
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interrupt-names:
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items:
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- const: tx_ts0
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- const: tx_ts1
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ethernet-ports:
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type: object
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additionalProperties: false
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properties:
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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patternProperties:
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^port@[0-1]$:
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type: object
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description: ICSSG PRUETH external ports
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$ref: ethernet-controller.yaml#
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unevaluatedProperties: false
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properties:
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reg:
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items:
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- enum: [0, 1]
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description: ICSSG PRUETH port number
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interrupts:
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maxItems: 1
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ti,syscon-rgmii-delay:
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items:
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- items:
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- description: phandle to system controller node
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- description: The offset to ICSSG control register
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description:
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phandle to system controller node and register offset
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to ICSSG control register for RGMII transmit delay
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ti,half-duplex-capable:
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type: boolean
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description:
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Indicates that the PHY output pin COL is routed to ICSSG GPIO pin
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(PRGx_PRU0/1_GPIO10) as input so that the ICSSG MII port is
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capable of half duplex operations.
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required:
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- reg
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anyOf:
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- required:
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- port@0
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- required:
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- port@1
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required:
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- compatible
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- sram
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- dmas
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- dma-names
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- ethernet-ports
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- ti,mii-g-rt
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- interrupts
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- interrupt-names
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unevaluatedProperties: false
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examples:
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- |
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/* Example k3-am654 base board SR2.0, dual-emac */
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pruss2_eth: ethernet {
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compatible = "ti,am654-icssg-prueth";
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pinctrl-names = "default";
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pinctrl-0 = <&icssg2_rgmii_pins_default>;
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sram = <&msmc_ram>;
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ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
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<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
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firmware-name = "ti-pruss/am65x-pru0-prueth-fw.elf",
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"ti-pruss/am65x-rtu0-prueth-fw.elf",
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"ti-pruss/am65x-txpru0-prueth-fw.elf",
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"ti-pruss/am65x-pru1-prueth-fw.elf",
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"ti-pruss/am65x-rtu1-prueth-fw.elf",
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"ti-pruss/am65x-txpru1-prueth-fw.elf";
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ti,pruss-gp-mux-sel = <2>, /* MII mode */
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<2>,
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<2>,
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<2>, /* MII mode */
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<2>,
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<2>;
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dmas = <&main_udmap 0xc300>, /* egress slice 0 */
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<&main_udmap 0xc301>, /* egress slice 0 */
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<&main_udmap 0xc302>, /* egress slice 0 */
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<&main_udmap 0xc303>, /* egress slice 0 */
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<&main_udmap 0xc304>, /* egress slice 1 */
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<&main_udmap 0xc305>, /* egress slice 1 */
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<&main_udmap 0xc306>, /* egress slice 1 */
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<&main_udmap 0xc307>, /* egress slice 1 */
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<&main_udmap 0x4300>, /* ingress slice 0 */
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<&main_udmap 0x4301>; /* ingress slice 1 */
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dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
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"tx1-0", "tx1-1", "tx1-2", "tx1-3",
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"rx0", "rx1";
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ti,mii-g-rt = <&icssg2_mii_g_rt>;
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ti,iep = <&icssg2_iep0>, <&icssg2_iep1>;
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interrupt-parent = <&icssg2_intc>;
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interrupts = <24 0 2>, <25 1 3>;
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interrupt-names = "tx_ts0", "tx_ts1";
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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pruss2_emac0: port@0 {
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reg = <0>;
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phy-handle = <&pruss2_eth0_phy>;
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phy-mode = "rgmii-id";
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interrupts-extended = <&icssg2_intc 24>;
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ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
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/* Filled in by bootloader */
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local-mac-address = [00 00 00 00 00 00];
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};
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pruss2_emac1: port@1 {
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reg = <1>;
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phy-handle = <&pruss2_eth1_phy>;
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phy-mode = "rgmii-id";
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interrupts-extended = <&icssg2_intc 25>;
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ti,syscon-rgmii-delay = <&scm_conf 0x4124>;
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/* Filled in by bootloader */
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local-mac-address = [00 00 00 00 00 00];
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};
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};
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};
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