139 lines
3.9 KiB
YAML
139 lines
3.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MIPI DBI SPI Panel
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maintainers:
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- Noralf Trønnes <noralf@tronnes.org>
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description: |
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This binding is for display panels using a MIPI DBI compatible controller
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in SPI mode.
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The MIPI Alliance Standard for Display Bus Interface defines the electrical
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and logical interfaces for display controllers historically used in mobile
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phones. The standard defines 4 display architecture types and this binding is
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for type 1 which has full frame memory. There are 3 interface types in the
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standard and type C is the serial interface.
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The standard defines the following interface signals for type C:
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- Power:
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- Vdd: Power supply for display module
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Called power-supply in this binding.
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- Vddi: Logic level supply for interface signals
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Called io-supply in this binding.
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- Interface:
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- CSx: Chip select
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- SCL: Serial clock
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- Dout: Serial out
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- Din: Serial in
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- SDA: Bidrectional in/out
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- D/CX: Data/command selection, high=data, low=command
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Called dc-gpios in this binding.
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- RESX: Reset when low
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Called reset-gpios in this binding.
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The type C interface has 3 options:
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- Option 1: 9-bit mode and D/CX as the 9th bit
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| Command | the next command or following data |
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|<0><D7><D6><D5><D4><D3><D2><D1><D0>|<D/CX><D7><D6><D5><D4><D3><D2><D1><D0>|
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- Option 2: 16-bit mode and D/CX as a 9th bit
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| Command or data |
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|<X><X><X><X><X><X><X><D/CX><D7><D6><D5><D4><D3><D2><D1><D0>|
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- Option 3: 8-bit mode and D/CX as a separate interface line
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| Command or data |
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|<D7><D6><D5><D4><D3><D2><D1><D0>|
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The panel resolution is specified using the panel-timing node properties
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hactive (width) and vactive (height). The other mandatory panel-timing
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properties should be set to zero except clock-frequency which can be
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optionally set to inform about the actual pixel clock frequency.
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If the panel is wired to the controller at an offset specify this using
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hback-porch (x-offset) and vback-porch (y-offset).
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allOf:
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- $ref: panel-common.yaml#
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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properties:
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compatible:
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items:
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- enum:
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- saef,sftc154b
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- sainsmart18
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- shineworld,lh133k
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- const: panel-mipi-dbi-spi
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write-only:
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type: boolean
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description:
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Controller is not readable (ie. Din (MISO on the SPI interface) is not
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wired up).
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dc-gpios:
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maxItems: 1
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description: |
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Controller data/command selection (D/CX) in 4-line SPI mode.
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If not set, the controller is in 3-line SPI mode.
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io-supply:
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description: |
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Logic level supply for interface signals (Vddi).
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No need to set if this is the same as power-supply.
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spi-3wire: true
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required:
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- compatible
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- reg
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- width-mm
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- height-mm
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- panel-timing
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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display@0{
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compatible = "sainsmart18", "panel-mipi-dbi-spi";
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reg = <0>;
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spi-max-frequency = <40000000>;
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dc-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
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write-only;
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backlight = <&backlight>;
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width-mm = <35>;
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height-mm = <28>;
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panel-timing {
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hactive = <160>;
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vactive = <128>;
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hback-porch = <0>;
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vback-porch = <0>;
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clock-frequency = <0>;
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hfront-porch = <0>;
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hsync-len = <0>;
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vfront-porch = <0>;
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vsync-len = <0>;
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};
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};
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};
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...
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