519 lines
13 KiB
C
519 lines
13 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel Vendor Specific Extended Capabilities auxiliary bus driver
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*
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* Copyright (c) 2021, Intel Corporation.
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* All Rights Reserved.
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*
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* Author: David E. Box <david.e.box@linux.intel.com>
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*
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* This driver discovers and creates auxiliary devices for Intel defined PCIe
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* "Vendor Specific" and "Designated Vendor Specific" Extended Capabilities,
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* VSEC and DVSEC respectively. The driver supports features on specific PCIe
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* endpoints that exist primarily to expose them.
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*/
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#include <linux/auxiliary_bus.h>
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#include <linux/bits.h>
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#include <linux/cleanup.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/idr.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/types.h>
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#include "vsec.h"
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#define PMT_XA_START 0
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#define PMT_XA_MAX INT_MAX
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#define PMT_XA_LIMIT XA_LIMIT(PMT_XA_START, PMT_XA_MAX)
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static DEFINE_IDA(intel_vsec_ida);
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static DEFINE_IDA(intel_vsec_sdsi_ida);
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static DEFINE_XARRAY_ALLOC(auxdev_array);
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static const char *intel_vsec_name(enum intel_vsec_id id)
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{
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switch (id) {
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case VSEC_ID_TELEMETRY:
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return "telemetry";
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case VSEC_ID_WATCHER:
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return "watcher";
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case VSEC_ID_CRASHLOG:
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return "crashlog";
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case VSEC_ID_SDSI:
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return "sdsi";
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case VSEC_ID_TPMI:
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return "tpmi";
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default:
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return NULL;
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}
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}
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static bool intel_vsec_supported(u16 id, unsigned long caps)
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{
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switch (id) {
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case VSEC_ID_TELEMETRY:
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return !!(caps & VSEC_CAP_TELEMETRY);
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case VSEC_ID_WATCHER:
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return !!(caps & VSEC_CAP_WATCHER);
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case VSEC_ID_CRASHLOG:
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return !!(caps & VSEC_CAP_CRASHLOG);
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case VSEC_ID_SDSI:
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return !!(caps & VSEC_CAP_SDSI);
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case VSEC_ID_TPMI:
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return !!(caps & VSEC_CAP_TPMI);
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default:
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return false;
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}
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}
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static void intel_vsec_remove_aux(void *data)
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{
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auxiliary_device_delete(data);
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auxiliary_device_uninit(data);
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}
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static DEFINE_MUTEX(vsec_ida_lock);
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static void intel_vsec_dev_release(struct device *dev)
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{
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struct intel_vsec_device *intel_vsec_dev = dev_to_ivdev(dev);
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xa_erase(&auxdev_array, intel_vsec_dev->id);
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mutex_lock(&vsec_ida_lock);
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ida_free(intel_vsec_dev->ida, intel_vsec_dev->auxdev.id);
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mutex_unlock(&vsec_ida_lock);
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kfree(intel_vsec_dev->resource);
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kfree(intel_vsec_dev);
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}
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int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent,
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struct intel_vsec_device *intel_vsec_dev,
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const char *name)
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{
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struct auxiliary_device *auxdev = &intel_vsec_dev->auxdev;
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int ret, id;
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if (!parent)
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return -EINVAL;
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ret = xa_alloc(&auxdev_array, &intel_vsec_dev->id, intel_vsec_dev,
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PMT_XA_LIMIT, GFP_KERNEL);
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if (ret < 0) {
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kfree(intel_vsec_dev->resource);
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kfree(intel_vsec_dev);
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return ret;
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}
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mutex_lock(&vsec_ida_lock);
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id = ida_alloc(intel_vsec_dev->ida, GFP_KERNEL);
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mutex_unlock(&vsec_ida_lock);
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if (id < 0) {
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xa_erase(&auxdev_array, intel_vsec_dev->id);
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kfree(intel_vsec_dev->resource);
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kfree(intel_vsec_dev);
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return id;
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}
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auxdev->id = id;
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auxdev->name = name;
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auxdev->dev.parent = parent;
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auxdev->dev.release = intel_vsec_dev_release;
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ret = auxiliary_device_init(auxdev);
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if (ret < 0) {
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intel_vsec_dev_release(&auxdev->dev);
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return ret;
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}
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ret = auxiliary_device_add(auxdev);
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if (ret < 0) {
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auxiliary_device_uninit(auxdev);
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return ret;
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}
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return devm_add_action_or_reset(parent, intel_vsec_remove_aux,
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auxdev);
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}
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EXPORT_SYMBOL_NS_GPL(intel_vsec_add_aux, INTEL_VSEC);
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static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *header,
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struct intel_vsec_platform_info *info)
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{
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struct intel_vsec_device __free(kfree) *intel_vsec_dev = NULL;
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struct resource __free(kfree) *res = NULL;
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struct resource *tmp;
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struct device *parent;
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unsigned long quirks = info->quirks;
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u64 base_addr;
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int i;
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if (info->parent)
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parent = info->parent;
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else
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parent = &pdev->dev;
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if (!intel_vsec_supported(header->id, info->caps))
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return -EINVAL;
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if (!header->num_entries) {
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dev_dbg(&pdev->dev, "Invalid 0 entry count for header id %d\n", header->id);
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return -EINVAL;
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}
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if (!header->entry_size) {
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dev_dbg(&pdev->dev, "Invalid 0 entry size for header id %d\n", header->id);
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return -EINVAL;
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}
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intel_vsec_dev = kzalloc(sizeof(*intel_vsec_dev), GFP_KERNEL);
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if (!intel_vsec_dev)
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return -ENOMEM;
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res = kcalloc(header->num_entries, sizeof(*res), GFP_KERNEL);
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if (!res)
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return -ENOMEM;
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if (quirks & VSEC_QUIRK_TABLE_SHIFT)
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header->offset >>= TABLE_OFFSET_SHIFT;
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if (info->base_addr)
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base_addr = info->base_addr;
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else
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base_addr = pdev->resource[header->tbir].start;
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/*
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* The DVSEC/VSEC contains the starting offset and count for a block of
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* discovery tables. Create a resource array of these tables to the
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* auxiliary device driver.
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*/
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for (i = 0, tmp = res; i < header->num_entries; i++, tmp++) {
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tmp->start = base_addr + header->offset + i * (header->entry_size * sizeof(u32));
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tmp->end = tmp->start + (header->entry_size * sizeof(u32)) - 1;
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tmp->flags = IORESOURCE_MEM;
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/* Check resource is not in use */
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if (!request_mem_region(tmp->start, resource_size(tmp), ""))
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return -EBUSY;
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release_mem_region(tmp->start, resource_size(tmp));
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}
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intel_vsec_dev->pcidev = pdev;
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intel_vsec_dev->resource = no_free_ptr(res);
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intel_vsec_dev->num_resources = header->num_entries;
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intel_vsec_dev->quirks = info->quirks;
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intel_vsec_dev->base_addr = info->base_addr;
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if (header->id == VSEC_ID_SDSI)
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intel_vsec_dev->ida = &intel_vsec_sdsi_ida;
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else
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intel_vsec_dev->ida = &intel_vsec_ida;
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/*
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* Pass the ownership of intel_vsec_dev and resource within it to
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* intel_vsec_add_aux()
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*/
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return intel_vsec_add_aux(pdev, parent, no_free_ptr(intel_vsec_dev),
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intel_vsec_name(header->id));
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}
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static bool intel_vsec_walk_header(struct pci_dev *pdev,
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struct intel_vsec_platform_info *info)
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{
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struct intel_vsec_header **header = info->headers;
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bool have_devices = false;
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int ret;
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for ( ; *header; header++) {
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ret = intel_vsec_add_dev(pdev, *header, info);
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if (ret)
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dev_info(&pdev->dev, "Could not add device for VSEC id %d\n",
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(*header)->id);
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else
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have_devices = true;
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}
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return have_devices;
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}
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static bool intel_vsec_walk_dvsec(struct pci_dev *pdev,
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struct intel_vsec_platform_info *info)
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{
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bool have_devices = false;
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int pos = 0;
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do {
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struct intel_vsec_header header;
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u32 table, hdr;
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u16 vid;
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int ret;
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pos = pci_find_next_ext_capability(pdev, pos, PCI_EXT_CAP_ID_DVSEC);
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if (!pos)
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break;
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pci_read_config_dword(pdev, pos + PCI_DVSEC_HEADER1, &hdr);
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vid = PCI_DVSEC_HEADER1_VID(hdr);
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if (vid != PCI_VENDOR_ID_INTEL)
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continue;
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/* Support only revision 1 */
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header.rev = PCI_DVSEC_HEADER1_REV(hdr);
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if (header.rev != 1) {
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dev_info(&pdev->dev, "Unsupported DVSEC revision %d\n", header.rev);
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continue;
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}
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header.length = PCI_DVSEC_HEADER1_LEN(hdr);
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pci_read_config_byte(pdev, pos + INTEL_DVSEC_ENTRIES, &header.num_entries);
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pci_read_config_byte(pdev, pos + INTEL_DVSEC_SIZE, &header.entry_size);
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pci_read_config_dword(pdev, pos + INTEL_DVSEC_TABLE, &table);
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header.tbir = INTEL_DVSEC_TABLE_BAR(table);
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header.offset = INTEL_DVSEC_TABLE_OFFSET(table);
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pci_read_config_dword(pdev, pos + PCI_DVSEC_HEADER2, &hdr);
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header.id = PCI_DVSEC_HEADER2_ID(hdr);
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ret = intel_vsec_add_dev(pdev, &header, info);
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if (ret)
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continue;
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have_devices = true;
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} while (true);
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return have_devices;
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}
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static bool intel_vsec_walk_vsec(struct pci_dev *pdev,
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struct intel_vsec_platform_info *info)
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{
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bool have_devices = false;
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int pos = 0;
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do {
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struct intel_vsec_header header;
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u32 table, hdr;
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int ret;
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pos = pci_find_next_ext_capability(pdev, pos, PCI_EXT_CAP_ID_VNDR);
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if (!pos)
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break;
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pci_read_config_dword(pdev, pos + PCI_VNDR_HEADER, &hdr);
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/* Support only revision 1 */
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header.rev = PCI_VNDR_HEADER_REV(hdr);
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if (header.rev != 1) {
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dev_info(&pdev->dev, "Unsupported VSEC revision %d\n", header.rev);
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continue;
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}
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header.id = PCI_VNDR_HEADER_ID(hdr);
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header.length = PCI_VNDR_HEADER_LEN(hdr);
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/* entry, size, and table offset are the same as DVSEC */
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pci_read_config_byte(pdev, pos + INTEL_DVSEC_ENTRIES, &header.num_entries);
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pci_read_config_byte(pdev, pos + INTEL_DVSEC_SIZE, &header.entry_size);
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pci_read_config_dword(pdev, pos + INTEL_DVSEC_TABLE, &table);
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header.tbir = INTEL_DVSEC_TABLE_BAR(table);
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header.offset = INTEL_DVSEC_TABLE_OFFSET(table);
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ret = intel_vsec_add_dev(pdev, &header, info);
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if (ret)
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continue;
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have_devices = true;
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} while (true);
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return have_devices;
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}
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void intel_vsec_register(struct pci_dev *pdev,
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struct intel_vsec_platform_info *info)
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{
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if (!pdev || !info)
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return;
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intel_vsec_walk_header(pdev, info);
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}
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EXPORT_SYMBOL_NS_GPL(intel_vsec_register, INTEL_VSEC);
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static int intel_vsec_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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struct intel_vsec_platform_info *info;
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bool have_devices = false;
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int ret;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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pci_save_state(pdev);
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info = (struct intel_vsec_platform_info *)id->driver_data;
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if (!info)
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return -EINVAL;
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if (intel_vsec_walk_dvsec(pdev, info))
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have_devices = true;
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if (intel_vsec_walk_vsec(pdev, info))
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have_devices = true;
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if (info && (info->quirks & VSEC_QUIRK_NO_DVSEC) &&
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||
|
|
intel_vsec_walk_header(pdev, info))
|
||
|
|
have_devices = true;
|
||
|
|
|
||
|
|
if (!have_devices)
|
||
|
|
return -ENODEV;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* DG1 info */
|
||
|
|
static struct intel_vsec_header dg1_header = {
|
||
|
|
.length = 0x10,
|
||
|
|
.id = 2,
|
||
|
|
.num_entries = 1,
|
||
|
|
.entry_size = 3,
|
||
|
|
.tbir = 0,
|
||
|
|
.offset = 0x466000,
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct intel_vsec_header *dg1_headers[] = {
|
||
|
|
&dg1_header,
|
||
|
|
NULL
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct intel_vsec_platform_info dg1_info = {
|
||
|
|
.caps = VSEC_CAP_TELEMETRY,
|
||
|
|
.headers = dg1_headers,
|
||
|
|
.quirks = VSEC_QUIRK_NO_DVSEC | VSEC_QUIRK_EARLY_HW,
|
||
|
|
};
|
||
|
|
|
||
|
|
/* MTL info */
|
||
|
|
static const struct intel_vsec_platform_info mtl_info = {
|
||
|
|
.caps = VSEC_CAP_TELEMETRY,
|
||
|
|
};
|
||
|
|
|
||
|
|
/* OOBMSM info */
|
||
|
|
static const struct intel_vsec_platform_info oobmsm_info = {
|
||
|
|
.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_SDSI | VSEC_CAP_TPMI,
|
||
|
|
};
|
||
|
|
|
||
|
|
/* TGL info */
|
||
|
|
static const struct intel_vsec_platform_info tgl_info = {
|
||
|
|
.caps = VSEC_CAP_TELEMETRY,
|
||
|
|
.quirks = VSEC_QUIRK_TABLE_SHIFT | VSEC_QUIRK_EARLY_HW,
|
||
|
|
};
|
||
|
|
|
||
|
|
/* LNL info */
|
||
|
|
static const struct intel_vsec_platform_info lnl_info = {
|
||
|
|
.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_WATCHER,
|
||
|
|
};
|
||
|
|
|
||
|
|
#define PCI_DEVICE_ID_INTEL_VSEC_ADL 0x467d
|
||
|
|
#define PCI_DEVICE_ID_INTEL_VSEC_DG1 0x490e
|
||
|
|
#define PCI_DEVICE_ID_INTEL_VSEC_MTL_M 0x7d0d
|
||
|
|
#define PCI_DEVICE_ID_INTEL_VSEC_MTL_S 0xad0d
|
||
|
|
#define PCI_DEVICE_ID_INTEL_VSEC_OOBMSM 0x09a7
|
||
|
|
#define PCI_DEVICE_ID_INTEL_VSEC_RPL 0xa77d
|
||
|
|
#define PCI_DEVICE_ID_INTEL_VSEC_TGL 0x9a0d
|
||
|
|
#define PCI_DEVICE_ID_INTEL_VSEC_LNL_M 0x647d
|
||
|
|
static const struct pci_device_id intel_vsec_pci_ids[] = {
|
||
|
|
{ PCI_DEVICE_DATA(INTEL, VSEC_ADL, &tgl_info) },
|
||
|
|
{ PCI_DEVICE_DATA(INTEL, VSEC_DG1, &dg1_info) },
|
||
|
|
{ PCI_DEVICE_DATA(INTEL, VSEC_MTL_M, &mtl_info) },
|
||
|
|
{ PCI_DEVICE_DATA(INTEL, VSEC_MTL_S, &mtl_info) },
|
||
|
|
{ PCI_DEVICE_DATA(INTEL, VSEC_OOBMSM, &oobmsm_info) },
|
||
|
|
{ PCI_DEVICE_DATA(INTEL, VSEC_RPL, &tgl_info) },
|
||
|
|
{ PCI_DEVICE_DATA(INTEL, VSEC_TGL, &tgl_info) },
|
||
|
|
{ PCI_DEVICE_DATA(INTEL, VSEC_LNL_M, &lnl_info) },
|
||
|
|
{ }
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(pci, intel_vsec_pci_ids);
|
||
|
|
|
||
|
|
static pci_ers_result_t intel_vsec_pci_error_detected(struct pci_dev *pdev,
|
||
|
|
pci_channel_state_t state)
|
||
|
|
{
|
||
|
|
pci_ers_result_t status = PCI_ERS_RESULT_NEED_RESET;
|
||
|
|
|
||
|
|
dev_info(&pdev->dev, "PCI error detected, state %d", state);
|
||
|
|
|
||
|
|
if (state == pci_channel_io_perm_failure)
|
||
|
|
status = PCI_ERS_RESULT_DISCONNECT;
|
||
|
|
else
|
||
|
|
pci_disable_device(pdev);
|
||
|
|
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
static pci_ers_result_t intel_vsec_pci_slot_reset(struct pci_dev *pdev)
|
||
|
|
{
|
||
|
|
struct intel_vsec_device *intel_vsec_dev;
|
||
|
|
pci_ers_result_t status = PCI_ERS_RESULT_DISCONNECT;
|
||
|
|
const struct pci_device_id *pci_dev_id;
|
||
|
|
unsigned long index;
|
||
|
|
|
||
|
|
dev_info(&pdev->dev, "Resetting PCI slot\n");
|
||
|
|
|
||
|
|
msleep(2000);
|
||
|
|
if (pci_enable_device(pdev)) {
|
||
|
|
dev_info(&pdev->dev,
|
||
|
|
"Failed to re-enable PCI device after reset.\n");
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
|
||
|
|
status = PCI_ERS_RESULT_RECOVERED;
|
||
|
|
|
||
|
|
xa_for_each(&auxdev_array, index, intel_vsec_dev) {
|
||
|
|
/* check if pdev doesn't match */
|
||
|
|
if (pdev != intel_vsec_dev->pcidev)
|
||
|
|
continue;
|
||
|
|
devm_release_action(&pdev->dev, intel_vsec_remove_aux,
|
||
|
|
&intel_vsec_dev->auxdev);
|
||
|
|
}
|
||
|
|
pci_disable_device(pdev);
|
||
|
|
pci_restore_state(pdev);
|
||
|
|
pci_dev_id = pci_match_id(intel_vsec_pci_ids, pdev);
|
||
|
|
intel_vsec_pci_probe(pdev, pci_dev_id);
|
||
|
|
|
||
|
|
out:
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void intel_vsec_pci_resume(struct pci_dev *pdev)
|
||
|
|
{
|
||
|
|
dev_info(&pdev->dev, "Done resuming PCI device\n");
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct pci_error_handlers intel_vsec_pci_err_handlers = {
|
||
|
|
.error_detected = intel_vsec_pci_error_detected,
|
||
|
|
.slot_reset = intel_vsec_pci_slot_reset,
|
||
|
|
.resume = intel_vsec_pci_resume,
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct pci_driver intel_vsec_pci_driver = {
|
||
|
|
.name = "intel_vsec",
|
||
|
|
.id_table = intel_vsec_pci_ids,
|
||
|
|
.probe = intel_vsec_pci_probe,
|
||
|
|
.err_handler = &intel_vsec_pci_err_handlers,
|
||
|
|
};
|
||
|
|
module_pci_driver(intel_vsec_pci_driver);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("David E. Box <david.e.box@linux.intel.com>");
|
||
|
|
MODULE_DESCRIPTION("Intel Extended Capabilities auxiliary bus driver");
|
||
|
|
MODULE_LICENSE("GPL v2");
|