404 lines
9.8 KiB
C
404 lines
9.8 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* ADA4250 driver
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*
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* Copyright 2022 Analog Devices Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/device.h>
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#include <linux/iio/iio.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#include <asm/unaligned.h>
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/* ADA4250 Register Map */
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#define ADA4250_REG_GAIN_MUX 0x00
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#define ADA4250_REG_REFBUF_EN 0x01
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#define ADA4250_REG_RESET 0x02
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#define ADA4250_REG_SNSR_CAL_VAL 0x04
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#define ADA4250_REG_SNSR_CAL_CNFG 0x05
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#define ADA4250_REG_DIE_REV 0x18
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#define ADA4250_REG_CHIP_ID 0x19
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/* ADA4250_REG_GAIN_MUX Map */
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#define ADA4250_GAIN_MUX_MSK GENMASK(2, 0)
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/* ADA4250_REG_REFBUF Map */
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#define ADA4250_REFBUF_MSK BIT(0)
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/* ADA4250_REG_RESET Map */
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#define ADA4250_RESET_MSK BIT(0)
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/* ADA4250_REG_SNSR_CAL_VAL Map */
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#define ADA4250_CAL_CFG_BIAS_MSK GENMASK(7, 0)
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/* ADA4250_REG_SNSR_CAL_CNFG Bit Definition */
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#define ADA4250_BIAS_SET_MSK GENMASK(3, 2)
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#define ADA4250_RANGE_SET_MSK GENMASK(1, 0)
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/* Miscellaneous definitions */
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#define ADA4250_CHIP_ID 0x4250
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#define ADA4250_RANGE1 0
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#define ADA4250_RANGE4 3
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/* ADA4250 current bias set */
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enum ada4250_current_bias {
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ADA4250_BIAS_DISABLED,
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ADA4250_BIAS_BANDGAP,
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ADA4250_BIAS_AVDD,
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};
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struct ada4250_state {
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struct spi_device *spi;
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struct regmap *regmap;
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struct regulator *reg;
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/* Protect against concurrent accesses to the device and data content */
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struct mutex lock;
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u8 bias;
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u8 gain;
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int offset_uv;
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bool refbuf_en;
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};
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/* ADA4250 Current Bias Source Settings: Disabled, Bandgap Reference, AVDD */
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static const int calibbias_table[] = {0, 1, 2};
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/* ADA4250 Gain (V/V) values: 1, 2, 4, 8, 16, 32, 64, 128 */
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static const int hwgain_table[] = {1, 2, 4, 8, 16, 32, 64, 128};
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static const struct regmap_config ada4250_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.read_flag_mask = BIT(7),
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.max_register = 0x1A,
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};
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static int ada4250_set_offset_uv(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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int offset_uv)
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{
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struct ada4250_state *st = iio_priv(indio_dev);
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int i, ret, x[8], max_vos, min_vos, voltage_v, vlsb = 0;
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u8 offset_raw, range = ADA4250_RANGE1;
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u32 lsb_coeff[6] = {1333, 2301, 4283, 8289, 16311, 31599};
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if (st->bias == 0 || st->bias == 3)
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return -EINVAL;
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voltage_v = regulator_get_voltage(st->reg);
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voltage_v = DIV_ROUND_CLOSEST(voltage_v, 1000000);
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if (st->bias == ADA4250_BIAS_AVDD)
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x[0] = voltage_v;
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else
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x[0] = 5;
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x[1] = 126 * (x[0] - 1);
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for (i = 0; i < 6; i++)
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x[i + 2] = DIV_ROUND_CLOSEST(x[1] * 1000, lsb_coeff[i]);
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if (st->gain == 0)
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return -EINVAL;
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/*
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* Compute Range and Voltage per LSB for the Sensor Offset Calibration
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* Example of computation for Range 1 and Range 2 (Curren Bias Set = AVDD):
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* Range 1 Range 2
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* Gain | Max Vos(mV) | LSB(mV) | Max Vos(mV) | LSB(mV) |
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* 2 | X1*127 | X1=0.126(AVDD-1) | X1*3*127 | X1*3 |
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* 4 | X2*127 | X2=X1/1.3333 | X2*3*127 | X2*3 |
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* 8 | X3*127 | X3=X1/2.301 | X3*3*127 | X3*3 |
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* 16 | X4*127 | X4=X1/4.283 | X4*3*127 | X4*3 |
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* 32 | X5*127 | X5=X1/8.289 | X5*3*127 | X5*3 |
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* 64 | X6*127 | X6=X1/16.311 | X6*3*127 | X6*3 |
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* 128 | X7*127 | X7=X1/31.599 | X7*3*127 | X7*3 |
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*/
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for (i = ADA4250_RANGE1; i <= ADA4250_RANGE4; i++) {
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max_vos = x[st->gain] * 127 * ((1 << (i + 1)) - 1);
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min_vos = -1 * max_vos;
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if (offset_uv > min_vos && offset_uv < max_vos) {
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range = i;
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vlsb = x[st->gain] * ((1 << (i + 1)) - 1);
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break;
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}
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}
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if (vlsb <= 0)
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return -EINVAL;
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offset_raw = DIV_ROUND_CLOSEST(abs(offset_uv), vlsb);
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mutex_lock(&st->lock);
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ret = regmap_update_bits(st->regmap, ADA4250_REG_SNSR_CAL_CNFG,
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ADA4250_RANGE_SET_MSK,
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FIELD_PREP(ADA4250_RANGE_SET_MSK, range));
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if (ret)
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goto exit;
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st->offset_uv = offset_raw * vlsb;
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/*
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* To set the offset calibration value, use bits [6:0] and bit 7 as the
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* polarity bit (set to "0" for a negative offset and "1" for a positive
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* offset).
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*/
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if (offset_uv < 0) {
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offset_raw |= BIT(7);
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st->offset_uv *= (-1);
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}
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ret = regmap_write(st->regmap, ADA4250_REG_SNSR_CAL_VAL, offset_raw);
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exit:
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mutex_unlock(&st->lock);
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return ret;
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}
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static int ada4250_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long info)
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{
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struct ada4250_state *st = iio_priv(indio_dev);
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int ret;
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switch (info) {
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case IIO_CHAN_INFO_HARDWAREGAIN:
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ret = regmap_read(st->regmap, ADA4250_REG_GAIN_MUX, val);
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if (ret)
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return ret;
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*val = BIT(*val);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_OFFSET:
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*val = st->offset_uv;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_CALIBBIAS:
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ret = regmap_read(st->regmap, ADA4250_REG_SNSR_CAL_CNFG, val);
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if (ret)
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return ret;
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*val = FIELD_GET(ADA4250_BIAS_SET_MSK, *val);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = 1;
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*val2 = 1000000;
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return IIO_VAL_FRACTIONAL;
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default:
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return -EINVAL;
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}
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}
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static int ada4250_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long info)
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{
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struct ada4250_state *st = iio_priv(indio_dev);
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int ret;
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switch (info) {
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case IIO_CHAN_INFO_HARDWAREGAIN:
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ret = regmap_write(st->regmap, ADA4250_REG_GAIN_MUX,
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FIELD_PREP(ADA4250_GAIN_MUX_MSK, ilog2(val)));
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if (ret)
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return ret;
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st->gain = ilog2(val);
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return ret;
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case IIO_CHAN_INFO_OFFSET:
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return ada4250_set_offset_uv(indio_dev, chan, val);
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case IIO_CHAN_INFO_CALIBBIAS:
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ret = regmap_update_bits(st->regmap, ADA4250_REG_SNSR_CAL_CNFG,
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ADA4250_BIAS_SET_MSK,
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FIELD_PREP(ADA4250_BIAS_SET_MSK, val));
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if (ret)
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return ret;
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st->bias = val;
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return ret;
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default:
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return -EINVAL;
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}
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}
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static int ada4250_read_avail(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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const int **vals, int *type, int *length,
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long mask)
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{
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switch (mask) {
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case IIO_CHAN_INFO_CALIBBIAS:
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*vals = calibbias_table;
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*type = IIO_VAL_INT;
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*length = ARRAY_SIZE(calibbias_table);
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return IIO_AVAIL_LIST;
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case IIO_CHAN_INFO_HARDWAREGAIN:
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*vals = hwgain_table;
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*type = IIO_VAL_INT;
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*length = ARRAY_SIZE(hwgain_table);
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return IIO_AVAIL_LIST;
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default:
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return -EINVAL;
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}
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}
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static int ada4250_reg_access(struct iio_dev *indio_dev,
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unsigned int reg,
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unsigned int write_val,
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unsigned int *read_val)
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{
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struct ada4250_state *st = iio_priv(indio_dev);
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if (read_val)
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return regmap_read(st->regmap, reg, read_val);
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else
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return regmap_write(st->regmap, reg, write_val);
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}
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static const struct iio_info ada4250_info = {
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.read_raw = ada4250_read_raw,
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.write_raw = ada4250_write_raw,
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.read_avail = &ada4250_read_avail,
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.debugfs_reg_access = &ada4250_reg_access,
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};
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static const struct iio_chan_spec ada4250_channels[] = {
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{
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.type = IIO_VOLTAGE,
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.output = 1,
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.indexed = 1,
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.channel = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_HARDWAREGAIN) |
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BIT(IIO_CHAN_INFO_OFFSET) |
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BIT(IIO_CHAN_INFO_CALIBBIAS) |
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BIT(IIO_CHAN_INFO_SCALE),
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.info_mask_separate_available = BIT(IIO_CHAN_INFO_CALIBBIAS) |
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BIT(IIO_CHAN_INFO_HARDWAREGAIN),
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}
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};
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static void ada4250_reg_disable(void *data)
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{
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regulator_disable(data);
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}
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static int ada4250_init(struct ada4250_state *st)
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{
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int ret;
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u16 chip_id;
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u8 data[2] __aligned(8) = {};
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struct spi_device *spi = st->spi;
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st->refbuf_en = device_property_read_bool(&spi->dev, "adi,refbuf-enable");
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st->reg = devm_regulator_get(&spi->dev, "avdd");
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if (IS_ERR(st->reg))
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return dev_err_probe(&spi->dev, PTR_ERR(st->reg),
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"failed to get the AVDD voltage\n");
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ret = regulator_enable(st->reg);
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if (ret) {
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dev_err(&spi->dev, "Failed to enable specified AVDD supply\n");
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return ret;
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}
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ret = devm_add_action_or_reset(&spi->dev, ada4250_reg_disable, st->reg);
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if (ret)
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return ret;
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ret = regmap_write(st->regmap, ADA4250_REG_RESET,
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FIELD_PREP(ADA4250_RESET_MSK, 1));
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if (ret)
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return ret;
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ret = regmap_bulk_read(st->regmap, ADA4250_REG_CHIP_ID, data, 2);
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if (ret)
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return ret;
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chip_id = get_unaligned_le16(data);
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if (chip_id != ADA4250_CHIP_ID) {
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dev_err(&spi->dev, "Invalid chip ID.\n");
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return -EINVAL;
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}
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return regmap_write(st->regmap, ADA4250_REG_REFBUF_EN,
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FIELD_PREP(ADA4250_REFBUF_MSK, st->refbuf_en));
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}
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static int ada4250_probe(struct spi_device *spi)
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{
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struct iio_dev *indio_dev;
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struct regmap *regmap;
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struct ada4250_state *st;
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
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if (!indio_dev)
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return -ENOMEM;
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regmap = devm_regmap_init_spi(spi, &ada4250_regmap_config);
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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st = iio_priv(indio_dev);
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st->regmap = regmap;
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st->spi = spi;
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indio_dev->info = &ada4250_info;
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indio_dev->name = "ada4250";
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indio_dev->channels = ada4250_channels;
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indio_dev->num_channels = ARRAY_SIZE(ada4250_channels);
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mutex_init(&st->lock);
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ret = ada4250_init(st);
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if (ret) {
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dev_err(&spi->dev, "ADA4250 init failed\n");
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return ret;
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}
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return devm_iio_device_register(&spi->dev, indio_dev);
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}
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static const struct spi_device_id ada4250_id[] = {
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{ "ada4250", 0 },
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{}
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};
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MODULE_DEVICE_TABLE(spi, ada4250_id);
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static const struct of_device_id ada4250_of_match[] = {
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{ .compatible = "adi,ada4250" },
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{},
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};
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MODULE_DEVICE_TABLE(of, ada4250_of_match);
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static struct spi_driver ada4250_driver = {
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.driver = {
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.name = "ada4250",
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.of_match_table = ada4250_of_match,
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},
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.probe = ada4250_probe,
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.id_table = ada4250_id,
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};
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module_spi_driver(ada4250_driver);
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MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com");
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MODULE_DESCRIPTION("Analog Devices ADA4250");
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MODULE_LICENSE("GPL v2");
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